Re: [PATCH v4 5/7] dt-bindings: usb: Add StarFive JH7110 USB Bindings YAML schemas

Krzysztof Kozlowski
2023-04-12T08:50:23Z

On 06/04/2023 03:52, Minda Chen wrote:
> StarFive JH7110 platforms USB have a wrapper module around
> the Cadence USBSS-DRD controller. Add binding information doc
> for that.

That's one of the most redundant subjects I saw. You basically used four
words for one meaning. These are not exactly synonyms, but they all are
either imprecise or meaning the same.

Subject: drop second/last, redundant "Bindings YAML schemas". The
"dt-bindings" prefix is already stating that these are bindings.

>
> Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
> Reviewed-by: Peter Chen <peter.chen@kernel.org>
> ---
> .../bindings/usb/starfive,jh7110-usb.yaml | 136 ++++++++++++++++++
> 1 file changed, 136 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/usb/starfive,jh7110-usb.yaml
>
> diff --git a/Documentation/devicetree/bindings/usb/starfive,jh7110-usb.yaml b/Documentation/devicetree/bindings/usb/starfive,jh7110-usb.yaml
> new file mode 100644
> index 000000000000..c8b30b583854
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/starfive,jh7110-usb.yaml
> @@ -0,0 +1,136 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/usb/starfive,jh7110-usb.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: StarFive JH7110 wrapper module for the Cadence USBSS-DRD controller

What do you wrap here? Are you sure this is a wrapper? I think this is
just USB controller?

> +
> +maintainers:
> + - Minda Chen <minda.chen@starfivetech.com>
> +
> +properties:
> + compatible:
> + const: starfive,jh7110-usb
> +
> + reg:
> + items:
> + - description: OTG controller registers
> + - description: XHCI Host controller registers
> + - description: DEVICE controller registers
> +
> + reg-names:
> + items:
> + - const: otg
> + - const: xhci
> + - const: dev
> +
> + interrupts:
> + items:
> + - description: XHCI host controller interrupt
> + - description: Device controller interrupt
> + - description: OTG/DRD controller interrupt
> +
> + interrupt-names:
> + items:
> + - const: host
> + - const: peripheral
> + - const: otg
> +
> + clocks:
> + items:
> + - description: lpm clock
> + - description: stb clock
> + - description: apb clock
> + - description: axi clock
> + - description: utmi apb clock
> +
> + clock-names:
> + items:
> + - const: lpm
> + - const: stb
> + - const: apb
> + - const: axi
> + - const: utmi_apb
> +
> + resets:
> + items:
> + - description: PWRUP reset
> + - description: APB clock reset
> + - description: AXI clock reset
> + - description: UTMI_APB clock reset
> +
> + reset-names:
> + items:
> + - const: pwrup
> + - const: apb
> + - const: axi
> + - const: utmi
> +
> + starfive,stg-syscon:
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + items:
> + items:

Same problem as for other patches.

> + - description: phandle to System Register Controller stg_syscon node.
> + - description: register offset of STG_SYSCONSAIF__SYSCFG register for USB.
> + description:
> + The phandle to System Register Controller syscon node and the offset
> + of STG_SYSCONSAIF__SYSCFG register for USB.
> +

Best regards,
Krzysztof