Re: [PATCH V2] mtd: rawnand: qcom: Implement exec_op()

[kernel test robot <lkp@intel.com>]

Hi Md,

kernel test robot noticed the following build warnings:

[auto build test WARNING on mtd/nand/next]
[also build test WARNING on linus/master v6.3 next-20230421]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Md-Sadre-Alam/mtd-rawnand-qcom-Implement-exec_op/20230419-173849
base:   https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git nand/next
patch link:    https://lore.kernel.org/r/20230419093617.27134-1-quic_mdalam%40quicinc.com
patch subject: [PATCH V2] mtd: rawnand: qcom: Implement exec_op()
config: nios2-randconfig-m041-20230423 (https://download.01.org/0day-ci/archive/20230424/202304241556.fafzkLLk-lkp@intel.com/config)
compiler: nios2-linux-gcc (GCC) 12.1.0

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
| Link: https://lore.kernel.org/oe-kbuild-all/202304241556.fafzkLLk-lkp@intel.com/

smatch warnings:
drivers/mtd/nand/raw/qcom_nandc.c:2751 qcom_read_status_exec() warn: inconsistent indenting

vim +2751 drivers/mtd/nand/raw/qcom_nandc.c

  2708	
  2709	static int qcom_read_status_exec(struct nand_chip *chip,
  2710					 const struct nand_subop *subop)
  2711	{
  2712		struct qcom_nand_host *host = to_qcom_nand_host(chip);
  2713		struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
  2714		struct nand_ecc_ctrl *ecc = &chip->ecc;
  2715		struct qcom_op q_op;
  2716		const struct nand_op_instr *instr = NULL;
  2717		unsigned int op_id = 0;
  2718		unsigned int len = 0;
  2719		int ret = 0, num_cw = 1, i;
  2720		u32 flash_status;
  2721	
  2722		host->status = NAND_STATUS_READY | NAND_STATUS_WP;
  2723	
  2724		qcom_parse_instructions(chip, subop, &q_op);
  2725	
  2726		if (nandc->exec_opwrite) {
  2727			num_cw = ecc->steps;
  2728			nandc->exec_opwrite = false;
  2729		}
  2730	
  2731		pre_command(host, NAND_CMD_STATUS);
  2732	
  2733		nandc_set_reg(chip, NAND_FLASH_CMD, q_op.cmd_reg);
  2734		nandc_set_reg(chip, NAND_EXEC_CMD, 1);
  2735	
  2736		write_reg_dma(nandc, NAND_FLASH_CMD, 1, NAND_BAM_NEXT_SGL);
  2737		write_reg_dma(nandc, NAND_EXEC_CMD, 1, NAND_BAM_NEXT_SGL);
  2738	
  2739		read_reg_dma(nandc, NAND_FLASH_STATUS, 1, NAND_BAM_NEXT_SGL);
  2740	
  2741		ret = submit_descs(nandc);
  2742		if (ret)
  2743			dev_err(nandc->dev, "failure in sbumitting status descriptor\n");
  2744	
  2745		free_descs(nandc);
  2746	
  2747		nandc_read_buffer_sync(nandc, true);
  2748		for (i = 0; i < num_cw; i++) {
  2749			flash_status = le32_to_cpu(nandc->reg_read_buf[i]);
  2750	
> 2751		if (flash_status & FS_MPU_ERR)
  2752			host->status &= ~NAND_STATUS_WP;
  2753	
  2754		if (flash_status & FS_OP_ERR || (i == (num_cw - 1) &&
  2755						 (flash_status & FS_DEVICE_STS_ERR)))
  2756			host->status |= NAND_STATUS_FAIL;
  2757		}
  2758	
  2759		flash_status = host->status;
  2760	
  2761		instr = q_op.data_instr;
  2762		op_id = q_op.data_instr_idx;
  2763		len = nand_subop_get_data_len(subop, op_id);
  2764		memcpy(instr->ctx.data.buf.in, &flash_status, len);
  2765	
  2766		return ret;
  2767	}
  2768	

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