Re: [GIT PULL] x86/shstk for 6.4

Dave Hansen
2023-05-09T00:07:33Z

On 5/8/23 16:31, Linus Torvalds wrote:
> On Mon, May 8, 2023 at 3:57 PM Dave Hansen <dave.hansen@intel.com> wrote:
...
>> This behavior is gone on shadow stack CPUs
>
> Ok, so Intel has actually tightened up the rules on setting dirty, and
> now guarantees that it will set dirty only if the pte is actually
> writable?

Yep:

Specifically, a processor that supports CET will never set the
dirty flag in a paging-structure entry in which the R/W flag is
clear.

and this was _absolutely_ one of the things the hardware folks did for
the benefit of software.

As for the mm->users==1 optimization, seems like something sane to
explore. I can't think of any ways off the top of my head that it would
break, but I'll go take a closer look.