Re: [PATCH v6 11/16] x86/mtrr: construct a memory map with cache modes

Juergen Gross
2023-05-09T11:47:53Z

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On 09.05.23 13:36, Borislav Petkov wrote:
> On Tue, May 02, 2023 at 02:09:26PM +0200, Juergen Gross wrote:
>> @@ -841,6 +1137,10 @@ static void generic_set_mtrr(unsigned int reg, unsigned long base,
>>
>> cache_enable();
>> local_irq_restore(flags);
>> +
>> + /* On the first CPU rebuild the cache mode memory map. */
>> + if (smp_processor_id() == cpumask_first(cpu_online_mask))
>> + rebuild_map();
>
> I still don't like this. Anything against doing this instead?

No, Should be fine. Apart from ...

>
> ---
> diff --git a/arch/x86/kernel/cpu/mtrr/generic.c b/arch/x86/kernel/cpu/mtrr/generic.c
> index 163dca53796c..e69c8c56897f 100644
> --- a/arch/x86/kernel/cpu/mtrr/generic.c
> +++ b/arch/x86/kernel/cpu/mtrr/generic.c
> @@ -458,8 +458,11 @@ static void map_add_var(void)
> * removals of registers, which are complicated to handle without rebuild of
> * the map.
> */
> -static void rebuild_map(void)
> +void rebuild_map(void)
> {
> + if (mtrr_if != &generic_mtrr_ops)
> + return;
> +
> cache_map_n = cache_map_fixed;
>
> map_add_var();
> @@ -1127,10 +1130,6 @@ static void generic_set_mtrr(unsigned int reg, unsigned long base,
>
> cache_enable();
> local_irq_restore(flags);
> -
> - /* On the first CPU rebuild the cache mode memory map. */
> - if (smp_processor_id() == cpumask_first(cpu_online_mask))
> - rebuild_map();
> }
>
> int generic_validate_add_page(unsigned long base, unsigned long size,
> diff --git a/arch/x86/kernel/cpu/mtrr/legacy.c b/arch/x86/kernel/cpu/mtrr/legacy.c
> index d25882fcf181..30a3d51d06e0 100644
> --- a/arch/x86/kernel/cpu/mtrr/legacy.c
> +++ b/arch/x86/kernel/cpu/mtrr/legacy.c
> @@ -67,6 +67,7 @@ static void mtrr_restore(void)
> mtrr_value[i].ltype);
> }
> }
> + rebuild_map();

... this call not being needed at all. We can reach this point only for
mtrr_if != &generic_mtrr_ops.

Juergen

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