* [PATCH v3 2/2] drm/msm: Be more shouty if per-process pgtables aren't working
2023-05-11 14:59 [PATCH v3 1/2] iommu/arm-smmu-qcom: Fix missing adreno_smmu's Rob Clark
@ 2023-05-11 14:59 ` Rob Clark
2023-05-16 1:16 ` [PATCH v3 1/2] iommu/arm-smmu-qcom: Fix missing adreno_smmu's Konrad Dybcio
2023-05-16 13:55 ` Will Deacon
2 siblings, 0 replies; 4+ messages in thread
From: Rob Clark @ 2023-05-11 14:59 UTC (permalink / raw)
To: dri-devel, iommu
Cc: freedreno, linux-arm-msm, Dmitry Baryshkov, Rob Clark, Rob Clark,
Abhinav Kumar, Sean Paul, David Airlie, Daniel Vetter, open list
From: Rob Clark <robdclark@chromium.org>
Otherwise it is not always obvious if a dt or iommu change is causing us
to fall back to global pgtable.
Signed-off-by: Rob Clark <robdclark@chromium.org>
---
drivers/gpu/drm/msm/msm_iommu.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/msm_iommu.c b/drivers/gpu/drm/msm/msm_iommu.c
index 418e1e06cdde..9b19124c9bd0 100644
--- a/drivers/gpu/drm/msm/msm_iommu.c
+++ b/drivers/gpu/drm/msm/msm_iommu.c
@@ -227,21 +227,26 @@ struct msm_mmu *msm_iommu_pagetable_create(struct msm_mmu *parent)
struct adreno_smmu_priv *adreno_smmu = dev_get_drvdata(parent->dev);
struct msm_iommu *iommu = to_msm_iommu(parent);
struct msm_iommu_pagetable *pagetable;
const struct io_pgtable_cfg *ttbr1_cfg = NULL;
struct io_pgtable_cfg ttbr0_cfg;
int ret;
/* Get the pagetable configuration from the domain */
if (adreno_smmu->cookie)
ttbr1_cfg = adreno_smmu->get_ttbr1_cfg(adreno_smmu->cookie);
- if (!ttbr1_cfg)
+
+ /*
+ * If you hit this WARN_ONCE() you are probably missing an entry in
+ * qcom_smmu_impl_of_match[] in arm-smmu-qcom.c
+ */
+ if (WARN_ONCE(!ttbr1_cfg, "No per-process page tables"))
return ERR_PTR(-ENODEV);
pagetable = kzalloc(sizeof(*pagetable), GFP_KERNEL);
if (!pagetable)
return ERR_PTR(-ENOMEM);
msm_mmu_init(&pagetable->base, parent->dev, &pagetable_funcs,
MSM_MMU_IOMMU_PAGETABLE);
/* Clone the TTBR1 cfg as starting point for TTBR0 cfg: */
--
2.40.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v3 1/2] iommu/arm-smmu-qcom: Fix missing adreno_smmu's
2023-05-11 14:59 [PATCH v3 1/2] iommu/arm-smmu-qcom: Fix missing adreno_smmu's Rob Clark
2023-05-11 14:59 ` [PATCH v3 2/2] drm/msm: Be more shouty if per-process pgtables aren't working Rob Clark
@ 2023-05-16 1:16 ` Konrad Dybcio
2023-05-16 13:55 ` Will Deacon
2 siblings, 0 replies; 4+ messages in thread
From: Konrad Dybcio @ 2023-05-16 1:16 UTC (permalink / raw)
To: Rob Clark, dri-devel, iommu
Cc: freedreno, linux-arm-msm, Dmitry Baryshkov, Rob Clark, Lepton Wu,
Will Deacon, Robin Murphy, Joerg Roedel, Sai Prakash Ranjan,
Bjorn Andersson, Marijn Suijten, Elliot Berman, Adam Skladowski,
moderated list:ARM SMMU DRIVERS, open list:IOMMU SUBSYSTEM,
open list
On 11.05.2023 16:59, Rob Clark wrote:
> From: Rob Clark <robdclark@chromium.org>
>
> When the special handling of qcom,adreno-smmu was moved into
> qcom_smmu_create(), it was overlooked that we didn't have all the
> required entries in qcom_smmu_impl_of_match. So we stopped getting
> adreno_smmu_priv on sc7180, breaking per-process pgtables.
>
> Fixes: 30b912a03d91 ("iommu/arm-smmu-qcom: Move the qcom,adreno-smmu check into qcom_smmu_create")
> Suggested-by: Lepton Wu <lepton@chromium.org>
> Signed-off-by: Rob Clark <robdclark@chromium.org>
> ---
> drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
> index d1b296b95c86..66e191773099 100644
> --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
> +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
> @@ -496,20 +496,21 @@ static const struct qcom_smmu_match_data qcom_smmu_500_impl0_data = {
> /*
> * Do not add any more qcom,SOC-smmu-500 entries to this list, unless they need
> * special handling and can not be covered by the qcom,smmu-500 entry.
> */
> static const struct of_device_id __maybe_unused qcom_smmu_impl_of_match[] = {
> { .compatible = "qcom,msm8996-smmu-v2", .data = &msm8996_smmu_data },
> { .compatible = "qcom,msm8998-smmu-v2", .data = &qcom_smmu_v2_data },
> { .compatible = "qcom,qcm2290-smmu-500", .data = &qcom_smmu_500_impl0_data },
> { .compatible = "qcom,qdu1000-smmu-500", .data = &qcom_smmu_500_impl0_data },
> { .compatible = "qcom,sc7180-smmu-500", .data = &qcom_smmu_500_impl0_data },
> + { .compatible = "qcom,sc7180-smmu-v2", .data = &qcom_smmu_v2_data },
> { .compatible = "qcom,sc7280-smmu-500", .data = &qcom_smmu_500_impl0_data },
> { .compatible = "qcom,sc8180x-smmu-500", .data = &qcom_smmu_500_impl0_data },
> { .compatible = "qcom,sc8280xp-smmu-500", .data = &qcom_smmu_500_impl0_data },
> { .compatible = "qcom,sdm630-smmu-v2", .data = &qcom_smmu_v2_data },
> { .compatible = "qcom,sdm845-smmu-v2", .data = &qcom_smmu_v2_data },
> { .compatible = "qcom,sdm845-smmu-500", .data = &sdm845_smmu_500_data },
> { .compatible = "qcom,sm6115-smmu-500", .data = &qcom_smmu_500_impl0_data},
> { .compatible = "qcom,sm6125-smmu-500", .data = &qcom_smmu_500_impl0_data },
> { .compatible = "qcom,sm6350-smmu-v2", .data = &qcom_smmu_v2_data },
> { .compatible = "qcom,sm6350-smmu-500", .data = &qcom_smmu_500_impl0_data },
> @@ -540,12 +541,18 @@ struct arm_smmu_device *qcom_smmu_impl_init(struct arm_smmu_device *smmu)
> /* Match platform for ACPI boot */
> if (acpi_match_platform_list(qcom_acpi_platlist) >= 0)
> return qcom_smmu_create(smmu, &qcom_smmu_500_impl0_data);
> }
> #endif
>
> match = of_match_node(qcom_smmu_impl_of_match, np);
> if (match)
> return qcom_smmu_create(smmu, match->data);
>
> + /* If you hit this WARN_ON() you are missing an entry in the
> + * qcom_smmu_impl_of_match[] table, and GPU per-process page-
> + * tables will be broken.
> + */
Nit: I think people generally do
/*
*
but I'm not the maintainer
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Cc: <stable@vger.kernel.org>
Konrad
> + WARN_ON(of_device_is_compatible(np, "qcom,adreno-smmu"));
> +
> return smmu;
> }
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH v3 1/2] iommu/arm-smmu-qcom: Fix missing adreno_smmu's
2023-05-11 14:59 [PATCH v3 1/2] iommu/arm-smmu-qcom: Fix missing adreno_smmu's Rob Clark
2023-05-11 14:59 ` [PATCH v3 2/2] drm/msm: Be more shouty if per-process pgtables aren't working Rob Clark
2023-05-16 1:16 ` [PATCH v3 1/2] iommu/arm-smmu-qcom: Fix missing adreno_smmu's Konrad Dybcio
@ 2023-05-16 13:55 ` Will Deacon
2 siblings, 0 replies; 4+ messages in thread
From: Will Deacon @ 2023-05-16 13:55 UTC (permalink / raw)
To: Rob Clark
Cc: dri-devel, iommu, freedreno, linux-arm-msm, Dmitry Baryshkov,
Rob Clark, Lepton Wu, Robin Murphy, Joerg Roedel,
Sai Prakash Ranjan, Konrad Dybcio, Bjorn Andersson,
Marijn Suijten, Elliot Berman, Adam Skladowski,
moderated list:ARM SMMU DRIVERS, open list:IOMMU SUBSYSTEM,
open list
On Thu, May 11, 2023 at 07:59:05AM -0700, Rob Clark wrote:
> From: Rob Clark <robdclark@chromium.org>
>
> When the special handling of qcom,adreno-smmu was moved into
> qcom_smmu_create(), it was overlooked that we didn't have all the
> required entries in qcom_smmu_impl_of_match. So we stopped getting
> adreno_smmu_priv on sc7180, breaking per-process pgtables.
>
> Fixes: 30b912a03d91 ("iommu/arm-smmu-qcom: Move the qcom,adreno-smmu check into qcom_smmu_create")
> Suggested-by: Lepton Wu <lepton@chromium.org>
> Signed-off-by: Rob Clark <robdclark@chromium.org>
> ---
> drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
> index d1b296b95c86..66e191773099 100644
> --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
> +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
> @@ -496,20 +496,21 @@ static const struct qcom_smmu_match_data qcom_smmu_500_impl0_data = {
> /*
> * Do not add any more qcom,SOC-smmu-500 entries to this list, unless they need
> * special handling and can not be covered by the qcom,smmu-500 entry.
> */
> static const struct of_device_id __maybe_unused qcom_smmu_impl_of_match[] = {
> { .compatible = "qcom,msm8996-smmu-v2", .data = &msm8996_smmu_data },
> { .compatible = "qcom,msm8998-smmu-v2", .data = &qcom_smmu_v2_data },
> { .compatible = "qcom,qcm2290-smmu-500", .data = &qcom_smmu_500_impl0_data },
> { .compatible = "qcom,qdu1000-smmu-500", .data = &qcom_smmu_500_impl0_data },
> { .compatible = "qcom,sc7180-smmu-500", .data = &qcom_smmu_500_impl0_data },
> + { .compatible = "qcom,sc7180-smmu-v2", .data = &qcom_smmu_v2_data },
> { .compatible = "qcom,sc7280-smmu-500", .data = &qcom_smmu_500_impl0_data },
> { .compatible = "qcom,sc8180x-smmu-500", .data = &qcom_smmu_500_impl0_data },
> { .compatible = "qcom,sc8280xp-smmu-500", .data = &qcom_smmu_500_impl0_data },
> { .compatible = "qcom,sdm630-smmu-v2", .data = &qcom_smmu_v2_data },
> { .compatible = "qcom,sdm845-smmu-v2", .data = &qcom_smmu_v2_data },
> { .compatible = "qcom,sdm845-smmu-500", .data = &sdm845_smmu_500_data },
> { .compatible = "qcom,sm6115-smmu-500", .data = &qcom_smmu_500_impl0_data},
> { .compatible = "qcom,sm6125-smmu-500", .data = &qcom_smmu_500_impl0_data },
> { .compatible = "qcom,sm6350-smmu-v2", .data = &qcom_smmu_v2_data },
> { .compatible = "qcom,sm6350-smmu-500", .data = &qcom_smmu_500_impl0_data },
> @@ -540,12 +541,18 @@ struct arm_smmu_device *qcom_smmu_impl_init(struct arm_smmu_device *smmu)
> /* Match platform for ACPI boot */
> if (acpi_match_platform_list(qcom_acpi_platlist) >= 0)
> return qcom_smmu_create(smmu, &qcom_smmu_500_impl0_data);
> }
> #endif
>
> match = of_match_node(qcom_smmu_impl_of_match, np);
> if (match)
> return qcom_smmu_create(smmu, match->data);
>
> + /* If you hit this WARN_ON() you are missing an entry in the
> + * qcom_smmu_impl_of_match[] table, and GPU per-process page-
> + * tables will be broken.
> + */
> + WARN_ON(of_device_is_compatible(np, "qcom,adreno-smmu"));
Wouldn't it be better to print the information from the comment, rather
than force the user to diagnose a WARN_ON() back to the source?
Will
^ permalink raw reply [flat|nested] 4+ messages in thread