[RFC PATCH 13/22] riscv: s64ilp32: Add ARCH RV64 ILP32 compiling framework

guoren
2023-05-18T13:15:32Z

Just the same as ARCH_RV64I & ARCH_RV32I, add ARCH_RV64ILP32 config
for s64ilp32 and turn on the s64ilp32 compile switch in the
arch/riscv/Makefile.

Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Signed-off-by: Guo Ren <guoren@kernel.org>
---
arch/riscv/Kconfig | 6 ++++++
arch/riscv/Makefile | 5 +++++
2 files changed, 11 insertions(+)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 4d4fac81390f..d824fcf3cc1c 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -300,6 +300,12 @@ config ARCH_RV64I
select ARCH_SUPPORTS_INT128 if CC_HAS_INT128
select SWIOTLB if MMU

+config ARCH_RV64ILP32
+ bool "RV64ILP32"
+ depends on NONPORTABLE
+ select 32BIT
+ select MMU
+
endchoice

# We must be able to map all physical memory into the kernel, but the compiler
diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
index dafe958c4217..d47ba6b09b41 100644
--- a/arch/riscv/Makefile
+++ b/arch/riscv/Makefile
@@ -57,6 +57,7 @@ endif
# ISA string setting
riscv-march-$(CONFIG_ARCH_RV32I) := rv32ima
riscv-march-$(CONFIG_ARCH_RV64I) := rv64ima
+riscv-march-$(CONFIG_ARCH_RV64ILP32) := rv64ima
riscv-march-$(CONFIG_FPU) := $(riscv-march-y)fd
riscv-march-$(CONFIG_RISCV_ISA_C) := $(riscv-march-y)c

@@ -107,7 +108,11 @@ stack_protector_prepare: prepare0
endif

# arch specific predefines for sparse
+ifeq ($(CONFIG_ARCH_RV64ILP32),y)
+CHECKFLAGS += -D__riscv
+else
CHECKFLAGS += -D__riscv -D__riscv_xlen=$(BITS)
+endif

# Default target when executing plain make
boot := arch/riscv/boot
--
2.36.1