From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 03CE8C7EE23 for ; Thu, 1 Jun 2023 13:07:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233397AbjFANHL (ORCPT ); Thu, 1 Jun 2023 09:07:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51558 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233266AbjFANHJ (ORCPT ); Thu, 1 Jun 2023 09:07:09 -0400 Received: from frasgout.his.huawei.com (frasgout.his.huawei.com [185.176.79.56]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C411297; Thu, 1 Jun 2023 06:07:07 -0700 (PDT) Received: from lhrpeml500005.china.huawei.com (unknown [172.18.147.201]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4QX5vW5Rbkz682sP; Thu, 1 Jun 2023 21:04:55 +0800 (CST) Received: from localhost (10.202.227.76) by lhrpeml500005.china.huawei.com (7.191.163.240) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.23; Thu, 1 Jun 2023 14:07:02 +0100 Date: Thu, 1 Jun 2023 14:07:01 +0100 From: Jonathan Cameron To: Terry Bowman CC: , , , , , , , , , Subject: Re: [PATCH v4 11/23] cxl/port: Store the downstream port's Component Register mappings in struct cxl_dport Message-ID: <20230601140701.00005e78@Huawei.com> In-Reply-To: <20230523232214.55282-12-terry.bowman@amd.com> References: <20230523232214.55282-1-terry.bowman@amd.com> <20230523232214.55282-12-terry.bowman@amd.com> Organization: Huawei Technologies Research and Development (UK) Ltd. X-Mailer: Claws Mail 4.1.0 (GTK 3.24.33; x86_64-w64-mingw32) MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.202.227.76] X-ClientProxiedBy: lhrpeml500005.china.huawei.com (7.191.163.240) To lhrpeml500005.china.huawei.com (7.191.163.240) X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 23 May 2023 18:22:02 -0500 Terry Bowman wrote: > From: Robert Richter > > Same as for ports, also store the downstream port's Component Register > mappings, use struct cxl_dport for that. > > Signed-off-by: Robert Richter > Signed-off-by: Terry Bowman Seems reasonable to me. Reviewed-by: Jonathan Cameron > --- > drivers/cxl/core/port.c | 11 +++++++++++ > drivers/cxl/cxl.h | 2 ++ > 2 files changed, 13 insertions(+) > > diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c > index 34e929f1723b..db2ba0c886e2 100644 > --- a/drivers/cxl/core/port.c > +++ b/drivers/cxl/core/port.c > @@ -708,6 +708,13 @@ static inline int cxl_port_setup_regs(struct cxl_port *port, > component_reg_phys); > } > > +static inline int cxl_dport_setup_regs(struct cxl_dport *dport, > + resource_size_t component_reg_phys) > +{ > + return cxl_setup_comp_regs(dport->dev, &dport->comp_map, > + component_reg_phys); > +} > + > static struct cxl_port *__devm_cxl_add_port(struct device *host, > struct device *uport, > resource_size_t component_reg_phys, > @@ -986,6 +993,10 @@ __devm_cxl_add_dport(struct cxl_port *port, struct device *dport_dev, > dport->port = port; > dport->rcrb.base = rcrb; > > + rc = cxl_dport_setup_regs(dport, component_reg_phys); > + if (rc && rc != -ENODEV) > + return ERR_PTR(rc); > + > cond_cxl_root_lock(port); > rc = add_dport(port, dport); > cond_cxl_root_unlock(port); > diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h > index c76e1f84ba61..dc83c1d0396e 100644 > --- a/drivers/cxl/cxl.h > +++ b/drivers/cxl/cxl.h > @@ -601,6 +601,7 @@ struct cxl_rcrb_info { > * struct cxl_dport - CXL downstream port > * @dev: PCI bridge or firmware device representing the downstream link > * @port: reference to cxl_port that contains this downstream port > + * @comp_map: component register capability mappings > * @port_id: unique hardware identifier for dport in decoder target list > * @component_reg_phys: downstream port component registers > * @rch: Indicate whether this dport was enumerated in RCH or VH mode > @@ -609,6 +610,7 @@ struct cxl_rcrb_info { > struct cxl_dport { > struct device *dev; > struct cxl_port *port; > + struct cxl_register_map comp_map; > int port_id; > resource_size_t component_reg_phys; > bool rch;