[PATCH -next 2/3] clk: stm32: core: Fix unsigned comparison with less than zero

Yang Li
2023-06-14T01:29:33Z

The return value of the divider_ro_round_rate() is long.
However, the return value is being assigned to an unsigned
long variable 'rate', so making 'rate' to long.

silence the warnings:
./drivers/clk/stm32/clk-stm32-core.c:451:6-10: WARNING: Unsigned expression compared with zero: rate < 0
./drivers/clk/stm32/clk-stm32-core.c:461:5-9: WARNING: Unsigned expression compared with zero: rate < 0

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=5519
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
---
drivers/clk/stm32/clk-stm32-core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/stm32/clk-stm32-core.c b/drivers/clk/stm32/clk-stm32-core.c
index d5aa09e9fce4..067b918a8894 100644
--- a/drivers/clk/stm32/clk-stm32-core.c
+++ b/drivers/clk/stm32/clk-stm32-core.c
@@ -431,7 +431,7 @@ static int clk_stm32_composite_determine_rate(struct clk_hw *hw,
{
struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);
const struct stm32_div_cfg *divider;
- unsigned long rate;
+ long rate;

if (composite->div_id == NO_STM32_DIV)
return 0;
--
2.20.1.7.g153144c