[PATCH 0/4] xtensa: add load/store exception handler

[Max Filippov <jcmvbkbc@gmail.com>]

Hello,

this series rearranges unaligned exception handler and adds load/store
exception handler that allows transparent 1- and 2-byte wide reads from
memory attached to an instruction bus of an xtensa core.

Max Filippov (4):
  xtensa: move early_trap_init from kasan_early_init to init_arch
  xtensa: always install slow handler for unaligned access exception
  xtensa: rearrange unaligned exception handler
  xtensa: add load/store exception handler

 arch/xtensa/Kconfig             |  12 ++
 arch/xtensa/include/asm/traps.h |   7 +
 arch/xtensa/kernel/align.S      | 256 ++++++++++++++++++++++----------
 arch/xtensa/kernel/setup.c      |   7 +
 arch/xtensa/kernel/traps.c      |  27 +++-
 arch/xtensa/mm/kasan_init.c     |   2 -
 6 files changed, 221 insertions(+), 90 deletions(-)

-- 
2.30.2