[PATCH 0/2] mtd: spi-nor: Avoid setting SRWD bit in SR

Amit Kumar Mahapatra
2023-06-15T11:17:04Z

Setting the status register write disable (SRWD) bit in the status
register (SR) with WP signal of the flash not connected will configure the
SR permanently as read-only. To avoid this a boolean type DT property
"broken-wp" is introduced. If this property is defined, the spi-nor doesn't
set the SRWD bit in SR while performing flash protection operation.
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BRANCH: for-next
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Amit Kumar Mahapatra (2):
dt-bindings: mtd: jedec, spi-nor: Add DT property to avoid setting
SRWD bit in status register
mtd: spi-nor: Avoid setting SRWD bit in SR if WP signal not connected

.../devicetree/bindings/mtd/jedec,spi-nor.yaml | 13 +++++++++++++
drivers/mtd/spi-nor/core.c | 3 +++
drivers/mtd/spi-nor/core.h | 1 +
drivers/mtd/spi-nor/swp.c | 5 +++--
4 files changed, 20 insertions(+), 2 deletions(-)

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2.17.1