[RESEND PATCH v2 09/14] net: stmmac: dwmac-qcom-ethqos: add support for the phyaux clock

Bartosz Golaszewski
2023-06-19T09:25:26Z

On sa8775p, the EMAC revision is 4 and we use SGMII instead of RGMII.
There's no "rgmii" clock but there's a fourth clock under a different
name: "phyaux". Add a new field to the chip data struct that specifies
the link clock name. Default to "rgmii" for backward compatibility.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
---
.../stmicro/stmmac/dwmac-qcom-ethqos.c | 31 ++++++++++---------
1 file changed, 16 insertions(+), 15 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
index 042733b5e80b..a739e1d5c046 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
@@ -85,6 +85,7 @@ struct ethqos_emac_driver_data {
unsigned int num_por;
bool rgmii_config_loopback_en;
bool has_emac3;
+ const char *link_clk_name;
struct dwmac4_addrs dwmac4_addrs;
};

@@ -92,8 +93,8 @@ struct qcom_ethqos {
struct platform_device *pdev;
void __iomem *rgmii_base;

- unsigned int rgmii_clk_rate;
- struct clk *rgmii_clk;
+ unsigned int link_clk_rate;
+ struct clk *link_clk;
struct phy *serdes_phy;
unsigned int speed;

@@ -156,23 +157,23 @@ static void rgmii_dump(void *priv)
#define RGMII_ID_MODE_10_LOW_SVS_CLK_FREQ (5 * 1000 * 1000UL)

static void
-ethqos_update_rgmii_clk(struct qcom_ethqos *ethqos, unsigned int speed)
+ethqos_update_link_clk(struct qcom_ethqos *ethqos, unsigned int speed)
{
switch (speed) {
case SPEED_1000:
- ethqos->rgmii_clk_rate = RGMII_1000_NOM_CLK_FREQ;
+ ethqos->link_clk_rate = RGMII_1000_NOM_CLK_FREQ;
break;

case SPEED_100:
- ethqos->rgmii_clk_rate = RGMII_ID_MODE_100_LOW_SVS_CLK_FREQ;
+ ethqos->link_clk_rate = RGMII_ID_MODE_100_LOW_SVS_CLK_FREQ;
break;

case SPEED_10:
- ethqos->rgmii_clk_rate = RGMII_ID_MODE_10_LOW_SVS_CLK_FREQ;
+ ethqos->link_clk_rate = RGMII_ID_MODE_10_LOW_SVS_CLK_FREQ;
break;
}

- clk_set_rate(ethqos->rgmii_clk, ethqos->rgmii_clk_rate);
+ clk_set_rate(ethqos->link_clk, ethqos->link_clk_rate);
}

static void ethqos_set_func_clk_en(struct qcom_ethqos *ethqos)
@@ -563,7 +564,7 @@ static void ethqos_fix_mac_speed(void *priv, unsigned int speed)
struct qcom_ethqos *ethqos = priv;

ethqos->speed = speed;
- ethqos_update_rgmii_clk(ethqos, speed);
+ ethqos_update_link_clk(ethqos, speed);
ethqos_configure(ethqos);
}

@@ -597,9 +598,9 @@ static int ethqos_clks_config(void *priv, bool enabled)
int ret = 0;

if (enabled) {
- ret = clk_prepare_enable(ethqos->rgmii_clk);
+ ret = clk_prepare_enable(ethqos->link_clk);
if (ret) {
- dev_err(&ethqos->pdev->dev, "rgmii_clk enable failed\n");
+ dev_err(&ethqos->pdev->dev, "link_clk enable failed\n");
return ret;
}

@@ -610,7 +611,7 @@ static int ethqos_clks_config(void *priv, bool enabled)
*/
ethqos_set_func_clk_en(ethqos);
} else {
- clk_disable_unprepare(ethqos->rgmii_clk);
+ clk_disable_unprepare(ethqos->link_clk);
}

return ret;
@@ -662,9 +663,9 @@ static int qcom_ethqos_probe(struct platform_device *pdev)
ethqos->rgmii_config_loopback_en = data->rgmii_config_loopback_en;
ethqos->has_emac3 = data->has_emac3;

- ethqos->rgmii_clk = devm_clk_get(dev, "rgmii");
- if (IS_ERR(ethqos->rgmii_clk)) {
- ret = PTR_ERR(ethqos->rgmii_clk);
+ ethqos->link_clk = devm_clk_get(dev, data->link_clk_name ?: "rgmii");
+ if (IS_ERR(ethqos->link_clk)) {
+ ret = PTR_ERR(ethqos->link_clk);
goto out_config_dt;
}

@@ -683,7 +684,7 @@ static int qcom_ethqos_probe(struct platform_device *pdev)
}

ethqos->speed = SPEED_1000;
- ethqos_update_rgmii_clk(ethqos, SPEED_1000);
+ ethqos_update_link_clk(ethqos, SPEED_1000);
ethqos_set_func_clk_en(ethqos);

plat_dat->bsp_priv = ethqos;
--
2.39.2