Re: [PATCH v4 3/3] riscv: dts: starfive: Add QSPI controller node for StarFive JH7110 SoC

Krzysztof Kozlowski
2023-07-04T09:44:30Z

On 04/07/2023 11:04, William Qiu wrote:
> Add the quad spi controller node for the StarFive JH7110 SoC.
>
> Co-developed-by: Ziv Xu <ziv.xu@starfivetech.com>
> Signed-off-by: Ziv Xu <ziv.xu@starfivetech.com>
> Signed-off-by: William Qiu <william.qiu@starfivetech.com>
> Reviewed-by: Hal Feng <hal.feng@starfivetech.com>

...

> + qspi: spi@13010000 {
> + compatible = "starfive,jh7110-qspi", "cdns,qspi-nor";
> + reg = <0x0 0x13010000 0x0 0x10000>,
> + <0x0 0x21000000 0x0 0x400000>;
> + interrupts = <25>;
> + clocks = <&syscrg JH7110_SYSCLK_QSPI_REF>,
> + <&syscrg JH7110_SYSCLK_QSPI_AHB>,
> + <&syscrg JH7110_SYSCLK_QSPI_APB>;
> + clock-names = "ref", "ahb", "apb";
> + resets = <&syscrg JH7110_SYSRST_QSPI_APB>,
> + <&syscrg JH7110_SYSRST_QSPI_AHB>,
> + <&syscrg JH7110_SYSRST_QSPI_REF>;
> + reset-names = "qspi", "qspi-ocp", "rstc_ref";
> + cdns,fifo-depth = <256>;
> + cdns,fifo-width = <4>;
> + cdns,trigger-address = <0x0>;

Bus nodes are usually disabled by default and enabled when needed for
specific boards.

Best regards,
Krzysztof