From: Sasha Levin <sashal@kernel.org>
To: linux-kernel@vger.kernel.org, stable@vger.kernel.org
Cc: Oswald Buddenhagen <oswald.buddenhagen@gmx.de>,
Takashi Iwai <tiwai@suse.de>, Sasha Levin <sashal@kernel.org>,
perex@perex.cz, tiwai@suse.com, alsa-devel@alsa-project.org
Subject: [PATCH AUTOSEL 6.4 09/58] ALSA: emu10k1: roll up loops in DSP setup code for Audigy
Date: Sun, 23 Jul 2023 21:12:37 -0400 [thread overview]
Message-ID: <20230724011338.2298062-9-sashal@kernel.org> (raw)
In-Reply-To: <20230724011338.2298062-1-sashal@kernel.org>
From: Oswald Buddenhagen <oswald.buddenhagen@gmx.de>
[ Upstream commit 8cabf83c7aa54530e699be56249fb44f9505c4f3 ]
There is no apparent reason for the massive code duplication.
Signed-off-by: Oswald Buddenhagen <oswald.buddenhagen@gmx.de>
Link: https://lore.kernel.org/r/20230510173917.3073107-3-oswald.buddenhagen@gmx.de
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
sound/pci/emu10k1/emufx.c | 112 +++-----------------------------------
1 file changed, 9 insertions(+), 103 deletions(-)
diff --git a/sound/pci/emu10k1/emufx.c b/sound/pci/emu10k1/emufx.c
index 3f64ccab0e632..fba19a854f27a 100644
--- a/sound/pci/emu10k1/emufx.c
+++ b/sound/pci/emu10k1/emufx.c
@@ -1559,14 +1559,8 @@ A_OP(icode, &ptr, iMAC0, A_GPR(var), A_GPR(var), A_GPR(vol), A_EXTIN(input))
gpr += 2;
/* Master volume (will be renamed later) */
- A_OP(icode, &ptr, iMAC0, A_GPR(playback+0+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+0+SND_EMU10K1_PLAYBACK_CHANNELS));
- A_OP(icode, &ptr, iMAC0, A_GPR(playback+1+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+1+SND_EMU10K1_PLAYBACK_CHANNELS));
- A_OP(icode, &ptr, iMAC0, A_GPR(playback+2+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+2+SND_EMU10K1_PLAYBACK_CHANNELS));
- A_OP(icode, &ptr, iMAC0, A_GPR(playback+3+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+3+SND_EMU10K1_PLAYBACK_CHANNELS));
- A_OP(icode, &ptr, iMAC0, A_GPR(playback+4+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+4+SND_EMU10K1_PLAYBACK_CHANNELS));
- A_OP(icode, &ptr, iMAC0, A_GPR(playback+5+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+5+SND_EMU10K1_PLAYBACK_CHANNELS));
- A_OP(icode, &ptr, iMAC0, A_GPR(playback+6+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+6+SND_EMU10K1_PLAYBACK_CHANNELS));
- A_OP(icode, &ptr, iMAC0, A_GPR(playback+7+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+7+SND_EMU10K1_PLAYBACK_CHANNELS));
+ for (z = 0; z < 8; z++)
+ A_OP(icode, &ptr, iMAC0, A_GPR(playback+z+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+z+SND_EMU10K1_PLAYBACK_CHANNELS));
snd_emu10k1_init_mono_control(&controls[nctl++], "Wave Master Playback Volume", gpr, 0);
gpr += 2;
@@ -1653,102 +1647,14 @@ A_OP(icode, &ptr, iMAC0, A_GPR(var), A_GPR(var), A_GPR(vol), A_EXTIN(input))
dev_dbg(emu->card->dev, "emufx.c: gpr=0x%x, tmp=0x%x\n",
gpr, tmp);
*/
- /* For the EMU1010: How to get 32bit values from the DSP. High 16bits into L, low 16bits into R. */
- /* A_P16VIN(0) is delayed by one sample,
- * so all other A_P16VIN channels will need to also be delayed
- */
- /* Left ADC in. 1 of 2 */
snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_P16VIN(0x0), A_FXBUS2(0) );
- /* Right ADC in 1 of 2 */
- gpr_map[gpr++] = 0x00000000;
- /* Delaying by one sample: instead of copying the input
- * value A_P16VIN to output A_FXBUS2 as in the first channel,
- * we use an auxiliary register, delaying the value by one
- * sample
- */
- snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr - 1), A_FXBUS2(2) );
- A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x1), A_C_00000000, A_C_00000000);
- gpr_map[gpr++] = 0x00000000;
- snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr - 1), A_FXBUS2(4) );
- A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x2), A_C_00000000, A_C_00000000);
- gpr_map[gpr++] = 0x00000000;
- snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr - 1), A_FXBUS2(6) );
- A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x3), A_C_00000000, A_C_00000000);
- /* For 96kHz mode */
- /* Left ADC in. 2 of 2 */
- gpr_map[gpr++] = 0x00000000;
- snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr - 1), A_FXBUS2(0x8) );
- A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x4), A_C_00000000, A_C_00000000);
- /* Right ADC in 2 of 2 */
- gpr_map[gpr++] = 0x00000000;
- snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr - 1), A_FXBUS2(0xa) );
- A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x5), A_C_00000000, A_C_00000000);
- gpr_map[gpr++] = 0x00000000;
- snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr - 1), A_FXBUS2(0xc) );
- A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x6), A_C_00000000, A_C_00000000);
- gpr_map[gpr++] = 0x00000000;
- snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr - 1), A_FXBUS2(0xe) );
- A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x7), A_C_00000000, A_C_00000000);
- /* Pavel Hofman - we still have voices, A_FXBUS2s, and
- * A_P16VINs available -
- * let's add 8 more capture channels - total of 16
- */
- gpr_map[gpr++] = 0x00000000;
- snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,
- bit_shifter16,
- A_GPR(gpr - 1),
- A_FXBUS2(0x10));
- A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x8),
- A_C_00000000, A_C_00000000);
- gpr_map[gpr++] = 0x00000000;
- snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,
- bit_shifter16,
- A_GPR(gpr - 1),
- A_FXBUS2(0x12));
- A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x9),
- A_C_00000000, A_C_00000000);
- gpr_map[gpr++] = 0x00000000;
- snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,
- bit_shifter16,
- A_GPR(gpr - 1),
- A_FXBUS2(0x14));
- A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xa),
- A_C_00000000, A_C_00000000);
- gpr_map[gpr++] = 0x00000000;
- snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,
- bit_shifter16,
- A_GPR(gpr - 1),
- A_FXBUS2(0x16));
- A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xb),
- A_C_00000000, A_C_00000000);
- gpr_map[gpr++] = 0x00000000;
- snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,
- bit_shifter16,
- A_GPR(gpr - 1),
- A_FXBUS2(0x18));
- A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xc),
- A_C_00000000, A_C_00000000);
- gpr_map[gpr++] = 0x00000000;
- snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,
- bit_shifter16,
- A_GPR(gpr - 1),
- A_FXBUS2(0x1a));
- A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xd),
- A_C_00000000, A_C_00000000);
- gpr_map[gpr++] = 0x00000000;
- snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,
- bit_shifter16,
- A_GPR(gpr - 1),
- A_FXBUS2(0x1c));
- A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xe),
- A_C_00000000, A_C_00000000);
- gpr_map[gpr++] = 0x00000000;
- snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,
- bit_shifter16,
- A_GPR(gpr - 1),
- A_FXBUS2(0x1e));
- A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xf),
- A_C_00000000, A_C_00000000);
+ /* A_P16VIN(0) is delayed by one sample, so all other A_P16VIN channels
+ * will need to also be delayed; we use an auxiliary register for that. */
+ for (z = 1; z < 0x10; z++) {
+ snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr), A_FXBUS2(z * 2) );
+ A_OP(icode, &ptr, iACC3, A_GPR(gpr), A_P16VIN(z), A_C_00000000, A_C_00000000);
+ gpr_map[gpr++] = 0x00000000;
+ }
}
#if 0
--
2.39.2
next prev parent reply other threads:[~2023-07-24 1:15 UTC|newest]
Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-24 1:12 [PATCH AUTOSEL 6.4 01/58] drm/amd/display: Do not set drr on pipe commit Sasha Levin
2023-07-24 1:12 ` [PATCH AUTOSEL 6.4 02/58] drm/amd/display: Update DTBCLK for DCN32 Sasha Levin
2023-07-24 1:12 ` [PATCH AUTOSEL 6.4 03/58] drm/scheduler: set entity to NULL in drm_sched_entity_pop_job() Sasha Levin
2023-07-24 1:12 ` [PATCH AUTOSEL 6.4 04/58] drm/amdgpu: fix calltrace warning in amddrm_buddy_fini Sasha Levin
2023-07-24 1:12 ` [PATCH AUTOSEL 6.4 05/58] drm/radeon: Fix integer overflow in radeon_cs_parser_init Sasha Levin
2023-07-24 1:12 ` [PATCH AUTOSEL 6.4 06/58] drm/amdgpu: Fix integer overflow in amdgpu_cs_pass1 Sasha Levin
2023-07-24 1:12 ` [PATCH AUTOSEL 6.4 07/58] drm/amdgpu: fix memory leak in mes self test Sasha Levin
2023-07-24 1:12 ` [PATCH AUTOSEL 6.4 08/58] Revert "drm/amd/display: disable SubVP + DRR to prevent underflow" Sasha Levin
2023-07-24 1:12 ` Sasha Levin [this message]
2023-07-24 1:12 ` [PATCH AUTOSEL 6.4 10/58] ASoC: Intel: sof_sdw: add quirk for MTL RVP Sasha Levin
2023-07-24 1:12 ` [PATCH AUTOSEL 6.4 11/58] ASoC: Intel: sof_sdw: add quirk for LNL RVP Sasha Levin
2023-07-24 1:12 ` [PATCH AUTOSEL 6.4 12/58] PCI: tegra194: Fix possible array out of bounds access Sasha Levin
2023-07-24 1:12 ` [PATCH AUTOSEL 6.4 13/58] ASoC: cs35l56: Move DSP part string generation so that it is done only once Sasha Levin
2023-07-24 1:12 ` [PATCH AUTOSEL 6.4 14/58] iommu: Make __iommu_group_set_domain() handle error unwind Sasha Levin
2023-07-24 1:12 ` [PATCH AUTOSEL 6.4 15/58] ASoC: SOF: amd: Add pci revision id check Sasha Levin
2023-07-24 1:12 ` [PATCH AUTOSEL 6.4 16/58] drm/stm: ltdc: fix late dereference check Sasha Levin
2023-07-24 1:12 ` [PATCH AUTOSEL 6.4 17/58] arm64: dts: qcom: ipq5332: add QFPROM node Sasha Levin
2023-07-24 1:12 ` [PATCH AUTOSEL 6.4 18/58] drm: rcar-du: remove R-Car H3 ES1.* workarounds Sasha Levin
2023-07-24 1:12 ` [PATCH AUTOSEL 6.4 19/58] ASoC: amd: vangogh: Add check for acp config flags in vangogh platform Sasha Levin
2023-07-24 1:12 ` [PATCH AUTOSEL 6.4 20/58] RDMA/mana_ib: Use v2 version of cfg_rx_steer_req to enable RX coalescing Sasha Levin
2023-07-24 1:12 ` [PATCH AUTOSEL 6.4 21/58] ARM: dts: imx6dl: prtrvt, prtvt7, prti6q, prtwd2: fix USB related warnings Sasha Levin
2023-07-24 1:12 ` [PATCH AUTOSEL 6.4 22/58] ASoC: Intel: sof_sdw_rt_sdca_jack_common: test SOF_JACK_JDSRC in _exit Sasha Levin
2023-07-24 1:12 ` [PATCH AUTOSEL 6.4 23/58] ASoC: Intel: sof_sdw: add quick for Dell SKU 0BDA Sasha Levin
2023-07-24 1:12 ` [PATCH AUTOSEL 6.4 24/58] ASoC: Intel: sof_sdw: Add support for Rex soundwire Sasha Levin
2023-07-24 1:12 ` [PATCH AUTOSEL 6.4 25/58] iopoll: Call cpu_relax() in busy loops Sasha Levin
2023-07-24 1:12 ` [PATCH AUTOSEL 6.4 26/58] quota: Properly disable quotas when add_dquot_ref() fails Sasha Levin
2023-07-24 1:12 ` [PATCH AUTOSEL 6.4 27/58] quota: fix warning in dqgrab() Sasha Levin
2023-07-24 1:12 ` [PATCH AUTOSEL 6.4 28/58] ALSA: hda: Add Loongson LS7A HD-Audio support Sasha Levin
2023-07-24 3:00 ` Yanteng Si
2023-07-24 1:12 ` [PATCH AUTOSEL 6.4 29/58] ASoC: SOF: Intel: fix SoundWire/HDaudio mutual exclusion Sasha Levin
2023-07-24 1:12 ` [PATCH AUTOSEL 6.4 30/58] dma-remap: use kvmalloc_array/kvfree for larger dma memory remap Sasha Levin
2023-07-24 1:12 ` [PATCH AUTOSEL 6.4 31/58] accel/habanalabs: add pci health check during heartbeat Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 32/58] accel/habanalabs: fix mem leak in capture user mappings Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 33/58] hwmon: (aquacomputer_d5next) Add support for Aquacomputer Leakshield Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 34/58] dt-bindings: input: goodix: Add "goodix,no-reset-during-suspend" property Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 35/58] HID: i2c-hid: goodix: Add support for " Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 36/58] HID: logitech-hidpp: Add USB and Bluetooth IDs for the Logitech G915 TKL Keyboard Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 37/58] iommu/amd: Introduce Disable IRTE Caching Support Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 38/58] drm/amdgpu: install stub fence into potential unused fence pointers Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 39/58] drm/amd/display: Remove v_startup workaround for dcn3+ Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 40/58] drm/amd/display: Trigger DIO FIFO resync on commit streams Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 41/58] drm/amd/display: Apply 60us prefetch for DCFCLK <= 300Mhz Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 42/58] Revert "drm/amd/display: Do not set drr on pipe commit" Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 43/58] HID: add quirk for 03f0:464a HP Elite Presenter Mouse Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 44/58] drm/amd/pm: Fill metrics data for SMUv13.0.6 Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 45/58] drm/amdgpu: unmap and remove csa_va properly Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 46/58] RDMA/mlx5: Return the firmware result upon destroying QP/RQ Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 47/58] RDMA/bnxt_re: consider timeout of destroy ah as success Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 48/58] drm/amd/display: Skip DPP DTO update if root clock is gated Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 49/58] drm/amd/display: Enable dcn314 DPP RCO Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 50/58] ASoC: SOF: core: Free the firmware trace before calling snd_sof_shutdown() Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 51/58] ovl: check type and offset of struct vfsmount in ovl_entry Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 52/58] HID: intel-ish-hid: ipc: Add Arrow Lake PCI device ID Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 53/58] udf: Fix uninitialized array access for some pathnames Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 54/58] ALSA: hda/realtek: Add quirks for ROG ALLY CS35l41 audio Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 55/58] fs: jfs: Fix UBSAN: array-index-out-of-bounds in dbAllocDmapLev Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 56/58] MIPS: dec: prom: Address -Warray-bounds warning Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 57/58] FS: JFS: Fix null-ptr-deref Read in txBegin Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 58/58] FS: JFS: Check for read-only mounted filesystem " Sasha Levin
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