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From: James Clark <james.clark@arm.com>
To: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.linux.dev
Cc: James Clark <james.clark@arm.com>, Marc Zyngier <maz@kernel.org>,
	Oliver Upton <oliver.upton@linux.dev>,
	James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>, Mike Leach <mike.leach@linaro.org>,
	Leo Yan <leo.yan@linaro.org>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Anshuman Khandual <anshuman.khandual@arm.com>,
	Rob Herring <robh@kernel.org>,
	linux-kernel@vger.kernel.org
Subject: [RFC PATCH 2/3] arm64: KVM: Support exclude_guest for Coresight trace in nVHE
Date: Fri,  4 Aug 2023 11:13:12 +0100	[thread overview]
Message-ID: <20230804101317.460697-3-james.clark@arm.com> (raw)
In-Reply-To: <20230804101317.460697-1-james.clark@arm.com>

Currently trace will always be generated in nVHE as long as TRBE isn't
being used. To allow filtering out guest trace, re-apply the filter
rules before switching to the guest.

The TRFCR restore function remains the same.

Signed-off-by: James Clark <james.clark@arm.com>
---
 arch/arm64/kvm/debug.c             |  7 ++++
 arch/arm64/kvm/hyp/nvhe/debug-sr.c | 56 +++++++++++++++++++++++++++---
 2 files changed, 59 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/kvm/debug.c b/arch/arm64/kvm/debug.c
index 8725291cb00a..ebb4db20a859 100644
--- a/arch/arm64/kvm/debug.c
+++ b/arch/arm64/kvm/debug.c
@@ -335,10 +335,17 @@ void kvm_arch_vcpu_load_debug_state_flags(struct kvm_vcpu *vcpu)
 	if (cpuid_feature_extract_unsigned_field(dfr0, ID_AA64DFR0_EL1_TraceBuffer_SHIFT) &&
 	    !(read_sysreg_s(SYS_TRBIDR_EL1) & TRBIDR_EL1_P))
 		vcpu_set_flag(vcpu, DEBUG_STATE_SAVE_TRBE);
+	/*
+	 * Save TRFCR on nVHE if FEAT_TRF exists. This will be done in cases
+	 * where DEBUG_STATE_SAVE_TRBE doesn't completely disable trace.
+	 */
+	if (cpuid_feature_extract_unsigned_field(dfr0, ID_AA64DFR0_EL1_TraceFilt_SHIFT))
+		vcpu_set_flag(vcpu, DEBUG_STATE_SAVE_TRFCR);
 }
 
 void kvm_arch_vcpu_put_debug_state_flags(struct kvm_vcpu *vcpu)
 {
 	vcpu_clear_flag(vcpu, DEBUG_STATE_SAVE_SPE);
 	vcpu_clear_flag(vcpu, DEBUG_STATE_SAVE_TRBE);
+	vcpu_clear_flag(vcpu, DEBUG_STATE_SAVE_TRFCR);
 }
diff --git a/arch/arm64/kvm/hyp/nvhe/debug-sr.c b/arch/arm64/kvm/hyp/nvhe/debug-sr.c
index 4558c02eb352..0e8c85b29b92 100644
--- a/arch/arm64/kvm/hyp/nvhe/debug-sr.c
+++ b/arch/arm64/kvm/hyp/nvhe/debug-sr.c
@@ -51,13 +51,17 @@ static void __debug_restore_spe(u64 pmscr_el1)
 	write_sysreg_s(pmscr_el1, SYS_PMSCR_EL1);
 }
 
-static void __debug_save_trace(u64 *trfcr_el1)
+/*
+ * Save TRFCR and disable trace completely if TRBE is being used. Return true
+ * if trace was disabled.
+ */
+static bool __debug_save_trace(u64 *trfcr_el1)
 {
 	*trfcr_el1 = 0;
 
 	/* Check if the TRBE is enabled */
 	if (!(read_sysreg_s(SYS_TRBLIMITR_EL1) & TRBLIMITR_EL1_E))
-		return;
+		return false;
 	/*
 	 * Prohibit trace generation while we are in guest.
 	 * Since access to TRFCR_EL1 is trapped, the guest can't
@@ -68,6 +72,8 @@ static void __debug_save_trace(u64 *trfcr_el1)
 	isb();
 	/* Drain the trace buffer to memory */
 	tsb_csync();
+
+	return true;
 }
 
 static void __debug_restore_trace(u64 trfcr_el1)
@@ -79,14 +85,55 @@ static void __debug_restore_trace(u64 trfcr_el1)
 	write_sysreg_s(trfcr_el1, SYS_TRFCR_EL1);
 }
 
+#if IS_ENABLED(CONFIG_PERF_EVENTS)
+static inline void __debug_save_trfcr(struct kvm_vcpu *vcpu)
+{
+	u64 trfcr;
+	struct kvm_etm_event etm_event = vcpu->arch.host_debug_state.etm_event;
+
+	/* No change if neither are excluded */
+	if (!etm_event.exclude_guest && !etm_event.exclude_host) {
+		/* Zeroing prevents restoring a stale value */
+		vcpu->arch.host_debug_state.trfcr_el1 = 0;
+		return;
+	}
+
+	trfcr = read_sysreg_s(SYS_TRFCR_EL1);
+	vcpu->arch.host_debug_state.trfcr_el1 = trfcr;
+
+	if (etm_event.exclude_guest) {
+		trfcr &= ~(TRFCR_ELx_ExTRE | TRFCR_ELx_E0TRE);
+	} else {
+		/*
+		 * If host was excluded then EL0 and ELx tracing bits will
+		 * already be cleared so they need to be set now for the guest.
+		 */
+		trfcr |= etm_event.exclude_kernel ? 0 : TRFCR_ELx_ExTRE;
+		trfcr |= etm_event.exclude_user ? 0 : TRFCR_ELx_E0TRE;
+	}
+	write_sysreg_s(trfcr, SYS_TRFCR_EL1);
+}
+#else
+static inline void __debug_save_trfcr(struct kvm_vcpu *vcpu) {}
+#endif
+
 void __debug_save_host_buffers_nvhe(struct kvm_vcpu *vcpu)
 {
+	bool trc_disabled = false;
+
 	/* Disable and flush SPE data generation */
 	if (vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_SPE))
 		__debug_save_spe(&vcpu->arch.host_debug_state.pmscr_el1);
 	/* Disable and flush Self-Hosted Trace generation */
 	if (vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_TRBE))
-		__debug_save_trace(&vcpu->arch.host_debug_state.trfcr_el1);
+		trc_disabled = __debug_save_trace(&vcpu->arch.host_debug_state.trfcr_el1);
+
+	/*
+	 * As long as trace wasn't completely disabled due to use of TRBE,
+	 * TRFCR can be saved and the exclude_guest rules applied.
+	 */
+	if (!trc_disabled && vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_TRFCR))
+		__debug_save_trfcr(vcpu);
 }
 
 void __debug_switch_to_guest(struct kvm_vcpu *vcpu)
@@ -98,7 +145,8 @@ void __debug_restore_host_buffers_nvhe(struct kvm_vcpu *vcpu)
 {
 	if (vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_SPE))
 		__debug_restore_spe(vcpu->arch.host_debug_state.pmscr_el1);
-	if (vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_TRBE))
+	if (vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_TRBE) ||
+	    vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_TRFCR))
 		__debug_restore_trace(vcpu->arch.host_debug_state.trfcr_el1);
 }
 
-- 
2.34.1


  parent reply	other threads:[~2023-08-04 10:14 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-04 10:13 [RFC PATCH 0/3] coresight: Support exclude_guest with Feat_TRF and nVHE James Clark
2023-08-04 10:13 ` [RFC PATCH 1/3] arm64: KVM: Add support for exclude_guest and exclude_host for ETM James Clark
2023-08-08  8:27   ` Marc Zyngier
2023-08-09 14:17     ` James Clark
2023-08-04 10:13 ` James Clark [this message]
2023-08-08 11:04   ` [RFC PATCH 2/3] arm64: KVM: Support exclude_guest for Coresight trace in nVHE Marc Zyngier
2023-08-09 14:20     ` James Clark
2023-08-04 10:13 ` [RFC PATCH 3/3] coresight: Support exclude_guest with Feat_TRF and nVHE James Clark
2023-08-04 19:09 ` [RFC PATCH 0/3] " Marc Zyngier
2023-08-05 10:28   ` Suzuki K Poulose
2023-08-08 11:06     ` Marc Zyngier
2023-08-05 10:14 ` Suzuki K Poulose

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