From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 62EF5C00528 for ; Fri, 4 Aug 2023 12:13:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229875AbjHDMNz (ORCPT ); Fri, 4 Aug 2023 08:13:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58692 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229463AbjHDMNx (ORCPT ); Fri, 4 Aug 2023 08:13:53 -0400 Received: from frasgout.his.huawei.com (frasgout.his.huawei.com [185.176.79.56]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B6BA946A6; Fri, 4 Aug 2023 05:13:52 -0700 (PDT) Received: from lhrpeml500005.china.huawei.com (unknown [172.18.147.207]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4RHPdW2FWQz6HJbr; Fri, 4 Aug 2023 20:09:03 +0800 (CST) Received: from localhost (10.202.227.76) by lhrpeml500005.china.huawei.com (7.191.163.240) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Fri, 4 Aug 2023 13:13:50 +0100 Date: Fri, 4 Aug 2023 13:13:49 +0100 From: Jonathan Cameron To: Smita Koralahalli CC: , , , Bjorn Helgaas , , Lukas Wunner , "Kuppuswamy Sathyanarayanan" , "Mahesh J Salgaonkar" , Alison Schofield , Vishal Verma , "Ira Weiny" , Ben Widawsky , "Dan Williams" , Yazen Ghannam , Terry Bowman , Robert Richter Subject: Re: [PATCH v3 2/3] PCI/AER: Export pcie_aer_is_native() Message-ID: <20230804131349.00003923@Huawei.com> In-Reply-To: <20230803230129.127590-3-Smita.KoralahalliChannabasappa@amd.com> References: <20230803230129.127590-1-Smita.KoralahalliChannabasappa@amd.com> <20230803230129.127590-3-Smita.KoralahalliChannabasappa@amd.com> Organization: Huawei Technologies Research and Development (UK) Ltd. X-Mailer: Claws Mail 4.1.0 (GTK 3.24.33; x86_64-w64-mingw32) MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.202.227.76] X-ClientProxiedBy: lhrpeml500005.china.huawei.com (7.191.163.240) To lhrpeml500005.china.huawei.com (7.191.163.240) X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 3 Aug 2023 23:01:28 +0000 Smita Koralahalli wrote: > Export and move the declaration of pcie_aer_is_native() to a common header > file to be reused by cxl/pci module. > > Signed-off-by: Smita Koralahalli > Acked-by: Bjorn Helgaas > Reviewed-by: Kuppuswamy Sathyanarayanan > Reviewed-by: Robert Richter Reviewed-by: Jonathan Cameron > --- > v2: > Fixed $SUBJECT > v3: > Added "Reviewd-by" tag. > --- > drivers/pci/pcie/aer.c | 1 + > drivers/pci/pcie/portdrv.h | 2 -- > include/linux/aer.h | 2 ++ > 3 files changed, 3 insertions(+), 2 deletions(-) > > diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c > index f6c24ded134c..87d90dbda023 100644 > --- a/drivers/pci/pcie/aer.c > +++ b/drivers/pci/pcie/aer.c > @@ -229,6 +229,7 @@ int pcie_aer_is_native(struct pci_dev *dev) > > return pcie_ports_native || host->native_aer; > } > +EXPORT_SYMBOL_GPL(pcie_aer_is_native); > > int pci_enable_pcie_error_reporting(struct pci_dev *dev) > { > diff --git a/drivers/pci/pcie/portdrv.h b/drivers/pci/pcie/portdrv.h > index 58a2b1a1cae4..1f3803bde7ee 100644 > --- a/drivers/pci/pcie/portdrv.h > +++ b/drivers/pci/pcie/portdrv.h > @@ -29,10 +29,8 @@ extern bool pcie_ports_dpc_native; > > #ifdef CONFIG_PCIEAER > int pcie_aer_init(void); > -int pcie_aer_is_native(struct pci_dev *dev); > #else > static inline int pcie_aer_init(void) { return 0; } > -static inline int pcie_aer_is_native(struct pci_dev *dev) { return 0; } > #endif > > #ifdef CONFIG_HOTPLUG_PCI_PCIE > diff --git a/include/linux/aer.h b/include/linux/aer.h > index 3a3ab05e13fd..94ce49a5f8d5 100644 > --- a/include/linux/aer.h > +++ b/include/linux/aer.h > @@ -45,6 +45,7 @@ struct aer_capability_regs { > int pci_enable_pcie_error_reporting(struct pci_dev *dev); > int pci_disable_pcie_error_reporting(struct pci_dev *dev); > int pci_aer_clear_nonfatal_status(struct pci_dev *dev); > +int pcie_aer_is_native(struct pci_dev *dev); > #else > static inline int pci_enable_pcie_error_reporting(struct pci_dev *dev) > { > @@ -58,6 +59,7 @@ static inline int pci_aer_clear_nonfatal_status(struct pci_dev *dev) > { > return -EINVAL; > } > +static inline int pcie_aer_is_native(struct pci_dev *dev) { return 0; } > #endif > > void cper_print_aer(struct pci_dev *dev, int aer_severity,