From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: x86@kernel.org, Tom Lendacky <thomas.lendacky@amd.com>,
Andrew Cooper <andrew.cooper3@citrix.com>,
Arjan van de Ven <arjan@linux.intel.com>,
Huang Rui <ray.huang@amd.com>, Juergen Gross <jgross@suse.com>,
Dimitri Sivanich <dimitri.sivanich@hpe.com>,
Michael Kelley <mikelley@microsoft.com>,
Sohil Mehta <sohil.mehta@intel.com>,
K Prateek Nayak <kprateek.nayak@amd.com>,
Kan Liang <kan.liang@linux.intel.com>,
Zhang Rui <rui.zhang@intel.com>,
"Paul E. McKenney" <paulmck@kernel.org>,
Feng Tang <feng.tang@intel.com>,
Andy Shevchenko <andy@infradead.org>
Subject: [patch 42/53] x86/cpu/topology: Let XEN/PV use topology from CPUID/MADT
Date: Mon, 7 Aug 2023 15:53:39 +0200 (CEST) [thread overview]
Message-ID: <20230807135028.642879580@linutronix.de> (raw)
In-Reply-To: 20230807130108.853357011@linutronix.de
It turns out that XEN/PV Dom0 has halfways usable CPUID/MADT enumeration
except that it cannot deal with CPUs which are enumerated as disabled in
MADT.
DomU has no MADT and provides at least rudimentary topology information in
CPUID leaves 1 and 4.
For both it's important that there are not more possible Linux CPUs than
vCPUs provided by the hypervisor.
As this is ensured by counting the vCPUs before enumeration happens:
- lift the restrictions in the CPUID evaluation and the MADT parser
- Utilize MADT registration for Dom0
- Keep the fake APIC ID registration for DomU
- Fix the XEN APIC fake so the readout of the local APIC ID works for
Dom0 via the hypercall and for DomU by returning the registered
fake APIC IDs.
With that the XEN/PV fake approximates usefulness.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
arch/x86/kernel/acpi/boot.c | 25 ++++++++-----------------
arch/x86/kernel/cpu/topology_common.c | 2 +-
arch/x86/xen/apic.c | 14 +++++++-------
arch/x86/xen/smp_pv.c | 13 ++++++++-----
4 files changed, 24 insertions(+), 30 deletions(-)
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -23,8 +23,6 @@
#include <linux/serial_core.h>
#include <linux/pgtable.h>
-#include <xen/xen.h>
-
#include <asm/e820/api.h>
#include <asm/irqdomain.h>
#include <asm/pci_x86.h>
@@ -161,12 +159,6 @@ static int __init acpi_parse_madt(struct
return 0;
}
-static __init void acpi_register_lapic(u32 apic_id, u32 acpi_id, bool present)
-{
- if (!xen_pv_domain())
- topology_register_apic(apic_id, acpi_id, present);
-}
-
static bool __init acpi_is_processor_usable(u32 lapic_flags)
{
if (lapic_flags & ACPI_MADT_ENABLED)
@@ -220,7 +212,7 @@ acpi_parse_x2apic(union acpi_subtable_he
return 0;
}
- acpi_register_lapic(apic_id, processor->uid, enabled);
+ topology_register_apic(apic_id, processor->uid, enabled);
#else
pr_warn("x2apic entry ignored\n");
#endif
@@ -255,9 +247,9 @@ acpi_parse_lapic(union acpi_subtable_hea
* to not preallocating memory for all NR_CPUS
* when we use CPU hotplug.
*/
- acpi_register_lapic(processor->id, /* APIC ID */
- processor->processor_id, /* ACPI ID */
- processor->lapic_flags & ACPI_MADT_ENABLED);
+ topology_register_apic(processor->id, /* APIC ID */
+ processor->processor_id, /* ACPI ID */
+ processor->lapic_flags & ACPI_MADT_ENABLED);
return 0;
}
@@ -274,9 +266,9 @@ acpi_parse_sapic(union acpi_subtable_hea
acpi_table_print_madt_entry(&header->common);
- acpi_register_lapic((processor->id << 8) | processor->eid,/* APIC ID */
- processor->processor_id, /* ACPI ID */
- processor->lapic_flags & ACPI_MADT_ENABLED);
+ topology_register_apic((processor->id << 8) | processor->eid,/* APIC ID */
+ processor->processor_id, /* ACPI ID */
+ processor->lapic_flags & ACPI_MADT_ENABLED);
return 0;
}
@@ -1073,8 +1065,7 @@ static int __init early_acpi_parse_madt_
return count;
}
- if (!xen_pv_domain())
- register_lapic_address(acpi_lapic_addr);
+ register_lapic_address(acpi_lapic_addr);
return count;
}
--- a/arch/x86/kernel/cpu/topology_common.c
+++ b/arch/x86/kernel/cpu/topology_common.c
@@ -77,7 +77,7 @@ static bool fake_topology(struct topo_sc
topology_set_dom(tscan, TOPO_SMT_DOMAIN, 0, 1);
topology_set_dom(tscan, TOPO_CORE_DOMAIN, 0, 1);
- return tscan->c->cpuid_level < 1 || xen_pv_domain();
+ return tscan->c->cpuid_level < 1;
}
static void parse_topology(struct topo_scan *tscan, bool early)
--- a/arch/x86/xen/apic.c
+++ b/arch/x86/xen/apic.c
@@ -43,20 +43,20 @@ static u32 xen_apic_read(u32 reg)
struct xen_platform_op op = {
.cmd = XENPF_get_cpuinfo,
.interface_version = XENPF_INTERFACE_VERSION,
- .u.pcpu_info.xen_cpuid = 0,
};
- int ret;
-
- /* Shouldn't need this as APIC is turned off for PV, and we only
- * get called on the bootup processor. But just in case. */
- if (!xen_initial_domain() || smp_processor_id())
- return 0;
+ int ret, cpu;
if (reg == APIC_LVR)
return 0x14;
if (reg != APIC_ID)
return 0;
+ cpu = smp_processor_id();
+ if (!xen_initial_domain())
+ return cpu ? cpuid_to_apicid[cpu] << 24 : 0;
+
+ op.u.pcpu_info.xen_cpuid = cpu;
+
ret = HYPERVISOR_platform_op(&op);
if (ret)
op.u.pcpu_info.apic_id = BAD_APICID;
--- a/arch/x86/xen/smp_pv.c
+++ b/arch/x86/xen/smp_pv.c
@@ -156,11 +156,9 @@ static void __init xen_pv_smp_config(voi
topology_register_boot_apic(apicid++);
- for (i = 1; i < nr_cpu_ids; i++) {
- if (HYPERVISOR_vcpu_op(VCPUOP_is_up, i, NULL) < 0)
- break;
+ for (i = 1; i < nr_cpu_ids; i++)
topology_register_apic(apicid++, CPU_ACPIID_INVALID, true);
- }
+
/* Pretend to be a proper enumerated system */
smp_found_config = 1;
}
@@ -451,5 +449,10 @@ void __init xen_smp_init(void)
/* Avoid searching for BIOS MP tables */
x86_init.mpparse.find_mptable = x86_init_noop;
x86_init.mpparse.early_parse_smp_cfg = x86_init_noop;
- x86_init.mpparse.parse_smp_cfg = xen_pv_smp_config;
+
+ /* XEN/PV Dom0 has halfways sane topology information via CPUID/MADT */
+ if (xen_initial_domain())
+ x86_init.mpparse.parse_smp_cfg = x86_init_noop;
+ else
+ x86_init.mpparse.parse_smp_cfg = xen_pv_smp_config;
}
next prev parent reply other threads:[~2023-08-07 13:55 UTC|newest]
Thread overview: 98+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-07 13:52 [patch 00/53] x86/topology: The final installment Thomas Gleixner
2023-08-07 13:52 ` [patch 01/53] x86/cpu/topology: Cure off by one in fake_topology() Thomas Gleixner
2023-08-07 13:52 ` [patch 02/53] x86/cpu/topology: Make the APIC mismatch warnings complete Thomas Gleixner
2023-08-07 14:28 ` Arjan van de Ven
2023-08-07 14:54 ` Thomas Gleixner
2023-08-07 13:52 ` [patch 03/53] x86/platform/ce4100: Dont override x86_init.mpparse.setup_ioapic_ids Thomas Gleixner
2023-08-07 15:20 ` Andy Shevchenko
2023-08-07 13:52 ` [patch 04/53] x86/ioapic: Replace some more set bit nonsense Thomas Gleixner
2023-08-07 13:52 ` [patch 05/53] x86/apic: Get rid of get_physical_broadcast() Thomas Gleixner
2023-08-07 15:24 ` Andy Shevchenko
2023-08-07 13:52 ` [patch 06/53] x86/ioapic: Make io_apic_get_unique_id() simpler Thomas Gleixner
2023-08-07 13:52 ` [patch 07/53] x86/ioapic: Simplify setup_ioapic_ids_from_mpc_nocheck() Thomas Gleixner
2023-08-07 13:52 ` [patch 08/53] x86/apic: Remove check_apicid_used() and ioapic_phys_id_map() Thomas Gleixner
2023-08-07 13:52 ` [patch 09/53] x86/mpparse: Rename default_find_smp_config() Thomas Gleixner
2023-08-07 16:03 ` Andy Shevchenko
2023-08-07 17:21 ` Thomas Gleixner
2023-08-07 13:52 ` [patch 10/53] x86/mpparse: Provide separate early/late callbacks Thomas Gleixner
2023-08-07 13:52 ` [patch 11/53] x86/mpparse: Prepare for callback separation Thomas Gleixner
2023-08-07 13:52 ` [patch 12/53] x86/dtb: Rename x86_dtb_init() Thomas Gleixner
2023-08-07 13:52 ` [patch 13/53] x86/platform/ce4100: Prepare for separate mpparse callbacks Thomas Gleixner
2023-08-07 13:52 ` [patch 14/53] x86/platform/intel-mid: " Thomas Gleixner
2023-08-07 16:07 ` Andy Shevchenko
2023-08-07 13:52 ` [patch 15/53] x86/jailhouse: " Thomas Gleixner
2023-08-07 13:52 ` [patch 16/53] x86/xen/smp_pv: " Thomas Gleixner
2023-08-07 13:53 ` [patch 17/53] x86/mpparse: Switch to new init callbacks Thomas Gleixner
2023-08-07 13:53 ` [patch 18/53] x86/mm/numa: Move early mptable evaluation into common code Thomas Gleixner
2023-08-07 13:53 ` [patch 19/53] x86/mpparse: Remove the physid_t bitmap wrapper Thomas Gleixner
2023-08-08 11:37 ` Andy Shevchenko
2023-08-07 13:53 ` [patch 20/53] x86/apic: Remove the pointless writeback of boot_cpu_physical_apicid Thomas Gleixner
2023-08-07 13:53 ` [patch 21/53] x86/apic: Remove yet another dubious callback Thomas Gleixner
2023-08-07 13:53 ` [patch 22/53] x86/apic: Use a proper define for invalid ACPI CPU ID Thomas Gleixner
2023-08-07 13:53 ` [patch 23/53] x86/cpu/topology: Move registration out of APIC code Thomas Gleixner
2023-08-07 13:53 ` [patch 24/53] x86/cpu/topology: Provide separate APIC registration functions Thomas Gleixner
2023-08-11 12:32 ` Zhang, Rui
2023-08-07 13:53 ` [patch 25/53] x86/acpi: Use new " Thomas Gleixner
2023-08-07 15:27 ` Peter Zijlstra
2023-08-07 15:35 ` Andrew Cooper
2023-08-07 15:41 ` Thomas Gleixner
2023-08-07 13:53 ` [patch 26/53] x86/jailhouse: Use new APIC registration function Thomas Gleixner
2023-08-07 13:53 ` [patch 27/53] x86/of: Use new APIC registration functions Thomas Gleixner
2023-08-07 13:53 ` [patch 28/53] x86/mpparse: Use new APIC registration function Thomas Gleixner
2023-08-07 13:53 ` [patch 29/53] x86/acpi: Dont invoke topology_register_apic() for XEN PV Thomas Gleixner
2023-08-07 13:53 ` [patch 30/53] x86/xen/smp_pv: Register fake APICs Thomas Gleixner
2023-08-07 13:53 ` [patch 31/53] x86/cpu/topology: Confine topology information Thomas Gleixner
2023-08-07 13:53 ` [patch 32/53] x86/cpu/topology: Simplify APIC registration Thomas Gleixner
2023-08-07 13:53 ` [patch 33/53] x86/cpu/topology: Use a data structure for topology info Thomas Gleixner
2023-08-07 13:53 ` [patch 34/53] x86/smpboot: Make error message actually useful Thomas Gleixner
2023-08-07 13:53 ` [patch 35/53] x86/cpu/topology: Sanitize the APIC admission logic Thomas Gleixner
2023-08-07 13:53 ` [patch 36/53] x86/cpu/topology: Rework possible CPU management Thomas Gleixner
2023-08-14 8:29 ` Zhang, Rui
2023-08-07 13:53 ` [patch 37/53] x86/cpu: Detect real BSP on crash kernels Thomas Gleixner
2024-01-08 14:11 ` Zhang, Rui
2024-01-08 14:54 ` Thomas Gleixner
2024-01-08 16:13 ` Thomas Gleixner
2024-01-09 1:54 ` Zhang, Rui
2024-01-10 14:19 ` Thomas Gleixner
2024-01-10 15:14 ` Thomas Gleixner
2024-01-11 1:52 ` Zhang, Rui
2024-01-12 9:14 ` Zhang, Rui
2024-01-12 15:39 ` Thomas Gleixner
2024-01-13 7:35 ` Zhang, Rui
2024-01-15 9:41 ` Thomas Gleixner
2023-08-07 13:53 ` [patch 38/53] x86/topology: Add a mechanism to track topology via APIC IDs Thomas Gleixner
2023-08-07 13:53 ` [patch 39/53] x86/cpu/topology: Reject unknown APIC IDs on ACPI hotplug Thomas Gleixner
2023-08-07 13:53 ` [patch 40/53] x86/cpu/topology: Assign hotpluggable CPUIDs during init Thomas Gleixner
2023-08-07 13:53 ` [patch 41/53] x86/xen/smp_pv: Count number of vCPUs early Thomas Gleixner
2023-08-07 13:53 ` Thomas Gleixner [this message]
2023-08-07 13:53 ` [patch 43/53] x86/cpu/topology: Use topology bitmaps for sizing Thomas Gleixner
2023-08-07 13:53 ` [patch 44/53] x86/cpu/topology: Mop up primary thread mask handling Thomas Gleixner
2023-08-07 13:53 ` [patch 45/53] x86/cpu/topology: Simplify cpu_mark_primary_thread() Thomas Gleixner
2023-08-07 13:53 ` [patch 46/53] x86/cpu/topology: Provide logical pkg/die mapping Thomas Gleixner
2023-08-07 13:53 ` [patch 47/53] x86/cpu/topology: Use topology logical mapping mechanism Thomas Gleixner
2023-08-07 13:53 ` [patch 48/53] x86/cpu/topology: Retrieve cores per package from topology bitmaps Thomas Gleixner
2023-08-07 13:53 ` [patch 49/53] x86: Use topology functions instead of smp_num_siblings where applicable Thomas Gleixner
2023-08-07 13:53 ` [patch 50/53] x86/cpu/topology: Rename smp_num_siblings Thomas Gleixner
2023-08-07 13:53 ` [patch 51/53] x86/cpu/topology: Rename topology_max_die_per_package() Thomas Gleixner
2023-08-07 13:53 ` [patch 52/53] x86/cpu/topology: Provide __num_[cores|threads]_per_package Thomas Gleixner
2023-08-07 13:53 ` [patch 53/53] x86/cpu/topology: Get rid of cpuinfo::x86_max_cores Thomas Gleixner
2023-08-11 15:44 ` Zhang, Rui
2023-12-14 14:00 ` Zhang, Rui
2023-08-08 7:40 ` [patch 00/53] x86/topology: The final installment Juergen Gross
2023-08-08 11:20 ` Andrew Cooper
2023-08-08 18:55 ` Thomas Gleixner
2023-08-08 18:29 ` Sohil Mehta
2023-08-08 19:10 ` Thomas Gleixner
2023-08-08 20:30 ` Sohil Mehta
2023-08-08 20:41 ` Thomas Gleixner
2023-08-08 22:10 ` Peter Zijlstra
2023-08-08 22:58 ` Sohil Mehta
2023-08-08 23:20 ` Thomas Gleixner
2023-08-09 16:55 ` Sohil Mehta
2023-08-10 3:28 ` Zhang, Rui
2023-08-09 16:50 ` Qiuxu Zhuo
2023-08-09 17:23 ` Sohil Mehta
2023-08-10 1:33 ` Zhuo, Qiuxu
2023-08-08 20:57 ` Thomas Gleixner
2023-08-09 16:12 ` Qiuxu Zhuo
2023-08-12 13:51 ` Michael Kelley (LINUX)
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