From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: x86@kernel.org, Tom Lendacky <thomas.lendacky@amd.com>,
Andrew Cooper <andrew.cooper3@citrix.com>,
Arjan van de Ven <arjan@linux.intel.com>,
Huang Rui <ray.huang@amd.com>, Juergen Gross <jgross@suse.com>,
Dimitri Sivanich <dimitri.sivanich@hpe.com>,
Michael Kelley <mikelley@microsoft.com>,
Wei Liu <wei.liu@kernel.org>, Pu Wen <puwen@hygon.cn>,
Qiuxu Zhuo <qiuxu.zhuo@intel.com>,
Sohil Mehta <sohil.mehta@intel.com>
Subject: [patch V4 09/41] x86/cpu: Move cpu_core_id into topology info
Date: Mon, 14 Aug 2023 10:53:48 +0200 (CEST) [thread overview]
Message-ID: <20230814085112.566519388@linutronix.de> (raw)
In-Reply-To: 20230814085006.593997112@linutronix.de
Rename it to core_id and stick it to the other ID fields.
No functional change.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Juergen Gross <jgross@suse.com>
Tested-by: Sohil Mehta <sohil.mehta@intel.com>
Tested-by: Michael Kelley <mikelley@microsoft.com>
---
arch/x86/include/asm/processor.h | 4 +++-
arch/x86/include/asm/topology.h | 2 +-
arch/x86/kernel/amd_nb.c | 4 ++--
arch/x86/kernel/cpu/amd.c | 8 ++++----
arch/x86/kernel/cpu/common.c | 4 ++--
arch/x86/kernel/cpu/hygon.c | 4 ++--
arch/x86/kernel/cpu/proc.c | 2 +-
arch/x86/kernel/cpu/topology.c | 2 +-
arch/x86/kernel/smpboot.c | 6 +++---
9 files changed, 19 insertions(+), 17 deletions(-)
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -88,6 +88,9 @@ struct cpuinfo_topology {
// Physical die ID on AMD, Relative on Intel
u32 die_id;
+
+ // Core ID relative to the package
+ u32 core_id;
};
struct cpuinfo_x86 {
@@ -142,7 +145,6 @@ struct cpuinfo_x86 {
/* Logical processor id: */
u16 logical_proc_id;
/* Core id: */
- u16 cpu_core_id;
u16 logical_die_id;
/* Index into per_cpu list: */
u16 cpu_index;
--- a/arch/x86/include/asm/topology.h
+++ b/arch/x86/include/asm/topology.h
@@ -109,7 +109,7 @@ extern const struct cpumask *cpu_cluster
#define topology_physical_package_id(cpu) (cpu_data(cpu).topo.pkg_id)
#define topology_logical_die_id(cpu) (cpu_data(cpu).logical_die_id)
#define topology_die_id(cpu) (cpu_data(cpu).topo.die_id)
-#define topology_core_id(cpu) (cpu_data(cpu).cpu_core_id)
+#define topology_core_id(cpu) (cpu_data(cpu).topo.core_id)
#define topology_ppin(cpu) (cpu_data(cpu).ppin)
extern unsigned int __max_die_per_package;
--- a/arch/x86/kernel/amd_nb.c
+++ b/arch/x86/kernel/amd_nb.c
@@ -378,7 +378,7 @@ int amd_get_subcaches(int cpu)
pci_read_config_dword(link, 0x1d4, &mask);
- return (mask >> (4 * cpu_data(cpu).cpu_core_id)) & 0xf;
+ return (mask >> (4 * cpu_data(cpu).topo.core_id)) & 0xf;
}
int amd_set_subcaches(int cpu, unsigned long mask)
@@ -404,7 +404,7 @@ int amd_set_subcaches(int cpu, unsigned
pci_write_config_dword(nb->misc, 0x1b8, reg & ~0x180000);
}
- cuid = cpu_data(cpu).cpu_core_id;
+ cuid = cpu_data(cpu).topo.core_id;
mask <<= 4 * cuid;
mask |= (0xf ^ (1 << cuid)) << 26;
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -373,7 +373,7 @@ static int nearby_node(int apicid)
#endif
/*
- * Fix up cpu_core_id for pre-F17h systems to be in the
+ * Fix up topo::core_id for pre-F17h systems to be in the
* [0 .. cores_per_node - 1] range. Not really needed but
* kept so as not to break existing setups.
*/
@@ -385,7 +385,7 @@ static void legacy_fixup_core_id(struct
return;
cus_per_node = c->x86_max_cores / nodes_per_socket;
- c->cpu_core_id %= cus_per_node;
+ c->topo.core_id %= cus_per_node;
}
/*
@@ -411,7 +411,7 @@ static void amd_get_topology(struct cpui
c->cu_id = ebx & 0xff;
if (c->x86 >= 0x17) {
- c->cpu_core_id = ebx & 0xff;
+ c->topo.core_id = ebx & 0xff;
if (smp_num_siblings > 1)
c->x86_max_cores /= smp_num_siblings;
@@ -454,7 +454,7 @@ static void amd_detect_cmp(struct cpuinf
bits = c->x86_coreid_bits;
/* Low order bits define the core id (index of core in socket) */
- c->cpu_core_id = c->topo.initial_apicid & ((1 << bits)-1);
+ c->topo.core_id = c->topo.initial_apicid & ((1 << bits)-1);
/* Convert the initial APIC ID into the socket ID */
c->topo.pkg_id = c->topo.initial_apicid >> bits;
/* use socket ID also for last level cache */
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -907,8 +907,8 @@ void detect_ht(struct cpuinfo_x86 *c)
core_bits = get_count_order(c->x86_max_cores);
- c->cpu_core_id = apic->phys_pkg_id(c->topo.initial_apicid, index_msb) &
- ((1 << core_bits) - 1);
+ c->topo.core_id = apic->phys_pkg_id(c->topo.initial_apicid, index_msb) &
+ ((1 << core_bits) - 1);
#endif
}
--- a/arch/x86/kernel/cpu/hygon.c
+++ b/arch/x86/kernel/cpu/hygon.c
@@ -74,7 +74,7 @@ static void hygon_get_topology(struct cp
c->topo.die_id = ecx & 0xff;
- c->cpu_core_id = ebx & 0xff;
+ c->topo.core_id = ebx & 0xff;
if (smp_num_siblings > 1)
c->x86_max_cores /= smp_num_siblings;
@@ -116,7 +116,7 @@ static void hygon_detect_cmp(struct cpui
bits = c->x86_coreid_bits;
/* Low order bits define the core id (index of core in socket) */
- c->cpu_core_id = c->topo.initial_apicid & ((1 << bits)-1);
+ c->topo.core_id = c->topo.initial_apicid & ((1 << bits)-1);
/* Convert the initial APIC ID into the socket ID */
c->topo.pkg_id = c->topo.initial_apicid >> bits;
/* use socket ID also for last level cache */
--- a/arch/x86/kernel/cpu/proc.c
+++ b/arch/x86/kernel/cpu/proc.c
@@ -21,7 +21,7 @@ static void show_cpuinfo_core(struct seq
seq_printf(m, "physical id\t: %d\n", c->topo.pkg_id);
seq_printf(m, "siblings\t: %d\n",
cpumask_weight(topology_core_cpumask(cpu)));
- seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
+ seq_printf(m, "core id\t\t: %d\n", c->topo.core_id);
seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
seq_printf(m, "apicid\t\t: %d\n", c->topo.apicid);
seq_printf(m, "initial apicid\t: %d\n", c->topo.initial_apicid);
--- a/arch/x86/kernel/cpu/topology.c
+++ b/arch/x86/kernel/cpu/topology.c
@@ -146,7 +146,7 @@ int detect_extended_topology(struct cpui
die_select_mask = (~(-1 << die_plus_mask_width)) >>
core_plus_mask_width;
- c->cpu_core_id = apic->phys_pkg_id(c->topo.initial_apicid,
+ c->topo.core_id = apic->phys_pkg_id(c->topo.initial_apicid,
ht_mask_width) & core_select_mask;
if (die_level_present) {
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -487,7 +487,7 @@ static bool match_smt(struct cpuinfo_x86
if (c->topo.pkg_id == o->topo.pkg_id &&
c->topo.die_id == o->topo.die_id &&
per_cpu(cpu_llc_id, cpu1) == per_cpu(cpu_llc_id, cpu2)) {
- if (c->cpu_core_id == o->cpu_core_id)
+ if (c->topo.core_id == o->topo.core_id)
return topology_sane(c, o, "smt");
if ((c->cu_id != 0xff) &&
@@ -498,7 +498,7 @@ static bool match_smt(struct cpuinfo_x86
} else if (c->topo.pkg_id == o->topo.pkg_id &&
c->topo.die_id == o->topo.die_id &&
- c->cpu_core_id == o->cpu_core_id) {
+ c->topo.core_id == o->topo.core_id) {
return topology_sane(c, o, "smt");
}
@@ -1439,7 +1439,7 @@ static void remove_siblinginfo(int cpu)
cpumask_clear(topology_sibling_cpumask(cpu));
cpumask_clear(topology_core_cpumask(cpu));
cpumask_clear(topology_die_cpumask(cpu));
- c->cpu_core_id = 0;
+ c->topo.core_id = 0;
c->booted_cores = 0;
cpumask_clear_cpu(cpu, cpu_sibling_setup_mask);
recompute_smt_state();
next prev parent reply other threads:[~2023-08-14 8:54 UTC|newest]
Thread overview: 85+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-14 8:53 [patch V4 00/41] x86/cpu: Rework the topology evaluation Thomas Gleixner
2023-08-14 8:53 ` [patch V4 01/41] x86/cpu/hygon: Fix the CPU topology evaluation for real Thomas Gleixner
2023-08-14 8:53 ` [patch V4 02/41] cpu/SMT: Make SMT control more robust against enumeration failures Thomas Gleixner
2023-08-15 21:15 ` Dave Hansen
2023-10-10 12:18 ` Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 03/41] x86/apic: Fake primary thread mask for XEN/PV Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 04/41] x86/cpu: Encapsulate topology information in cpuinfo_x86 Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 05/41] x86/cpu: Move phys_proc_id into topology info Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 06/41] x86/cpu: Move cpu_die_id " Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 07/41] scsi: lpfc: Use topology_core_id() Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 08/41] hwmon: (fam15h_power) " Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` Thomas Gleixner [this message]
2023-10-13 9:38 ` [tip: x86/core] x86/cpu: Move cpu_core_id into topology info tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 10/41] x86/cpu: Move cu_id " Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 11/41] x86/cpu: Remove pointless evaluation of x86_coreid_bits Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 12/41] x86/cpu: Move logical package and die IDs into topology info Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 13/41] x86/cpu: Move cpu_l[l2]c_id " Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 14/41] x86/apic: Use BAD_APICID consistently Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 15/41] x86/apic: Use u32 for APIC IDs in global data Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 16/41] x86/apic: Use u32 for check_apicid_used() Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:54 ` [patch V4 17/41] x86/apic: Use u32 for cpu_present_to_apicid() Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:54 ` [patch V4 18/41] x86/apic: Use u32 for phys_pkg_id() Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:54 ` [patch V4 19/41] x86/apic: Use u32 for [gs]et_apic_id() Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:54 ` [patch V4 20/41] x86/apic: Use u32 for wakeup_secondary_cpu[_64]() Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-10-13 10:32 ` [tip: x86/core] x86/apic, x86/hyperv: Use u32 in hv_snp_boot_ap() too tip-bot2 for Ingo Molnar
2023-08-14 8:54 ` [patch V4 21/41] x86/cpu/topology: Cure the abuse of cpuinfo for persisting logical ids Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:54 ` [patch V4 22/41] x86/cpu: Provide debug interface Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:54 ` [patch V4 23/41] x86/cpu: Provide cpuid_read() et al Thomas Gleixner
2023-08-14 8:54 ` [patch V4 24/41] x86/cpu: Provide cpu_init/parse_topology() Thomas Gleixner
2023-08-28 6:07 ` K Prateek Nayak
2023-08-28 10:05 ` Thomas Gleixner
2023-08-28 14:03 ` Arjan van de Ven
2023-08-28 14:28 ` K Prateek Nayak
2023-08-28 14:34 ` Arjan van de Ven
2023-08-29 3:16 ` K Prateek Nayak
2023-09-15 11:54 ` Peter Zijlstra
2023-09-15 14:04 ` Arjan van de Ven
2023-09-19 3:54 ` K Prateek Nayak
2023-09-19 8:13 ` Thomas Gleixner
2023-09-20 3:23 ` K Prateek Nayak
2023-09-19 13:44 ` Arjan van de Ven
2023-09-20 3:21 ` K Prateek Nayak
2023-09-14 9:20 ` K Prateek Nayak
2023-09-15 11:46 ` Thomas Gleixner
2023-08-14 8:54 ` [patch V4 25/41] x86/cpu: Add legacy topology parser Thomas Gleixner
2023-08-14 8:54 ` [patch V4 26/41] x86/cpu: Use common topology code for Centaur and Zhaoxin Thomas Gleixner
2023-08-14 8:54 ` [patch V4 27/41] x86/cpu: Move __max_die_per_package to common.c Thomas Gleixner
2023-08-14 8:54 ` [patch V4 28/41] x86/cpu: Provide a sane leaf 0xb/0x1f parser Thomas Gleixner
2023-08-16 12:09 ` Zhang, Rui
2023-08-17 9:11 ` Thomas Gleixner
2023-08-14 8:54 ` [patch V4 29/41] x86/cpu: Use common topology code for Intel Thomas Gleixner
2023-08-14 8:54 ` [patch V4 30/41] x86/cpu/amd: Provide a separate accessor for Node ID Thomas Gleixner
2023-08-14 8:54 ` [patch V4 31/41] x86/cpu: Provide an AMD/HYGON specific topology parser Thomas Gleixner
2023-08-14 8:54 ` [patch V4 32/41] x86/smpboot: Teach it about topo.amd_node_id Thomas Gleixner
2023-08-14 8:54 ` [patch V4 33/41] x86/cpu: Use common topology code for AMD Thomas Gleixner
2023-08-14 8:54 ` [patch V4 34/41] x86/cpu: Use common topology code for HYGON Thomas Gleixner
2023-08-14 8:54 ` [patch V4 35/41] x86/mm/numa: Use core domain size on AMD Thomas Gleixner
2023-08-14 8:54 ` [patch V4 36/41] x86/cpu: Make topology_amd_node_id() use the actual node info Thomas Gleixner
2023-08-14 8:54 ` [patch V4 37/41] x86/cpu: Remove topology.c Thomas Gleixner
2023-08-14 8:54 ` [patch V4 38/41] x86/cpu: Remove x86_coreid_bits Thomas Gleixner
2023-08-14 8:54 ` [patch V4 39/41] x86/apic: Remove unused phys_pkg_id() callback Thomas Gleixner
2023-08-14 8:54 ` [patch V4 40/41] x86/xen/smp_pv: Remove cpudata fiddling Thomas Gleixner
2023-08-14 8:54 ` [patch V4 41/41] x86/apic/uv: Remove the private leaf 0xb parser Thomas Gleixner
2023-08-14 14:36 ` [patch V4 00/41] x86/cpu: Rework the topology evaluation Peter Zijlstra
2023-08-16 11:36 ` Zhang, Rui
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