From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: x86@kernel.org, Tom Lendacky <thomas.lendacky@amd.com>,
Andrew Cooper <andrew.cooper3@citrix.com>,
Arjan van de Ven <arjan@linux.intel.com>,
Huang Rui <ray.huang@amd.com>, Juergen Gross <jgross@suse.com>,
Dimitri Sivanich <dimitri.sivanich@hpe.com>,
Michael Kelley <mikelley@microsoft.com>,
Wei Liu <wei.liu@kernel.org>, Pu Wen <puwen@hygon.cn>,
Qiuxu Zhuo <qiuxu.zhuo@intel.com>,
Sohil Mehta <sohil.mehta@intel.com>
Subject: [patch V4 20/41] x86/apic: Use u32 for wakeup_secondary_cpu[_64]()
Date: Mon, 14 Aug 2023 10:54:05 +0200 (CEST) [thread overview]
Message-ID: <20230814085113.233274223@linutronix.de> (raw)
In-Reply-To: 20230814085006.593997112@linutronix.de
APIC IDs are used with random data types u16, u32, int, unsigned int,
unsigned long.
Make it all consistently use u32 because that reflects the hardware
register width.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Juergen Gross <jgross@suse.com>
Tested-by: Sohil Mehta <sohil.mehta@intel.com>
Tested-by: Michael Kelley <mikelley@microsoft.com>
Reviewed-by: Arjan van de Ven <arjan@linux.intel.com>
---
arch/x86/hyperv/hv_vtl.c | 2 +-
arch/x86/include/asm/apic.h | 8 ++++----
arch/x86/kernel/acpi/boot.c | 2 +-
arch/x86/kernel/apic/apic_noop.c | 2 +-
arch/x86/kernel/apic/apic_numachip.c | 2 +-
arch/x86/kernel/apic/x2apic_uv_x.c | 2 +-
arch/x86/kernel/sev.c | 2 +-
7 files changed, 10 insertions(+), 10 deletions(-)
--- a/arch/x86/hyperv/hv_vtl.c
+++ b/arch/x86/hyperv/hv_vtl.c
@@ -192,7 +192,7 @@ static int hv_vtl_apicid_to_vp_id(u32 ap
return ret;
}
-static int hv_vtl_wakeup_secondary_cpu(int apicid, unsigned long start_eip)
+static int hv_vtl_wakeup_secondary_cpu(u32 apicid, unsigned long start_eip)
{
int vp_id;
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -302,9 +302,9 @@ struct apic {
u32 (*set_apic_id)(u32 apicid);
/* wakeup_secondary_cpu */
- int (*wakeup_secondary_cpu)(int apicid, unsigned long start_eip);
+ int (*wakeup_secondary_cpu)(u32 apicid, unsigned long start_eip);
/* wakeup secondary CPU using 64-bit wakeup point */
- int (*wakeup_secondary_cpu_64)(int apicid, unsigned long start_eip);
+ int (*wakeup_secondary_cpu_64)(u32 apicid, unsigned long start_eip);
char *name;
};
@@ -322,8 +322,8 @@ struct apic_override {
void (*send_IPI_self)(int vector);
u64 (*icr_read)(void);
void (*icr_write)(u32 low, u32 high);
- int (*wakeup_secondary_cpu)(int apicid, unsigned long start_eip);
- int (*wakeup_secondary_cpu_64)(int apicid, unsigned long start_eip);
+ int (*wakeup_secondary_cpu)(u32 apicid, unsigned long start_eip);
+ int (*wakeup_secondary_cpu_64)(u32 apicid, unsigned long start_eip);
};
/*
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -358,7 +358,7 @@ acpi_parse_lapic_nmi(union acpi_subtable
}
#ifdef CONFIG_X86_64
-static int acpi_wakeup_cpu(int apicid, unsigned long start_ip)
+static int acpi_wakeup_cpu(u32 apicid, unsigned long start_ip)
{
/*
* Remap mailbox memory only for the first call to acpi_wakeup_cpu().
--- a/arch/x86/kernel/apic/apic_noop.c
+++ b/arch/x86/kernel/apic/apic_noop.c
@@ -27,7 +27,7 @@ static void noop_send_IPI_allbutself(int
static void noop_send_IPI_all(int vector) { }
static void noop_send_IPI_self(int vector) { }
static void noop_apic_icr_write(u32 low, u32 id) { }
-static int noop_wakeup_secondary_cpu(int apicid, unsigned long start_eip) { return -1; }
+static int noop_wakeup_secondary_cpu(u32 apicid, unsigned long start_eip) { return -1; }
static u64 noop_apic_icr_read(void) { return 0; }
static u32 noop_phys_pkg_id(u32 cpuid_apic, int index_msb) { return 0; }
static u32 noop_get_apic_id(u32 apicid) { return 0; }
--- a/arch/x86/kernel/apic/apic_numachip.c
+++ b/arch/x86/kernel/apic/apic_numachip.c
@@ -71,7 +71,7 @@ static void numachip2_apic_icr_write(int
numachip2_write32_lcsr(NUMACHIP2_APIC_ICR, (apicid << 12) | val);
}
-static int numachip_wakeup_secondary(int phys_apicid, unsigned long start_rip)
+static int numachip_wakeup_secondary(u32 phys_apicid, unsigned long start_rip)
{
numachip_apic_icr_write(phys_apicid, APIC_DM_INIT);
numachip_apic_icr_write(phys_apicid, APIC_DM_STARTUP |
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -702,7 +702,7 @@ static __init void build_uv_gr_table(voi
}
}
-static int uv_wakeup_secondary(int phys_apicid, unsigned long start_rip)
+static int uv_wakeup_secondary(u32 phys_apicid, unsigned long start_rip)
{
unsigned long val;
int pnode;
--- a/arch/x86/kernel/sev.c
+++ b/arch/x86/kernel/sev.c
@@ -940,7 +940,7 @@ static void snp_cleanup_vmsa(struct sev_
free_page((unsigned long)vmsa);
}
-static int wakeup_cpu_via_vmgexit(int apic_id, unsigned long start_ip)
+static int wakeup_cpu_via_vmgexit(u32 apic_id, unsigned long start_ip)
{
struct sev_es_save_area *cur_vmsa, *vmsa;
struct ghcb_state state;
next prev parent reply other threads:[~2023-08-14 8:55 UTC|newest]
Thread overview: 85+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-14 8:53 [patch V4 00/41] x86/cpu: Rework the topology evaluation Thomas Gleixner
2023-08-14 8:53 ` [patch V4 01/41] x86/cpu/hygon: Fix the CPU topology evaluation for real Thomas Gleixner
2023-08-14 8:53 ` [patch V4 02/41] cpu/SMT: Make SMT control more robust against enumeration failures Thomas Gleixner
2023-08-15 21:15 ` Dave Hansen
2023-10-10 12:18 ` Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 03/41] x86/apic: Fake primary thread mask for XEN/PV Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 04/41] x86/cpu: Encapsulate topology information in cpuinfo_x86 Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 05/41] x86/cpu: Move phys_proc_id into topology info Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 06/41] x86/cpu: Move cpu_die_id " Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 07/41] scsi: lpfc: Use topology_core_id() Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 08/41] hwmon: (fam15h_power) " Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 09/41] x86/cpu: Move cpu_core_id into topology info Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 10/41] x86/cpu: Move cu_id " Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 11/41] x86/cpu: Remove pointless evaluation of x86_coreid_bits Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 12/41] x86/cpu: Move logical package and die IDs into topology info Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 13/41] x86/cpu: Move cpu_l[l2]c_id " Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 14/41] x86/apic: Use BAD_APICID consistently Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 15/41] x86/apic: Use u32 for APIC IDs in global data Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 16/41] x86/apic: Use u32 for check_apicid_used() Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:54 ` [patch V4 17/41] x86/apic: Use u32 for cpu_present_to_apicid() Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:54 ` [patch V4 18/41] x86/apic: Use u32 for phys_pkg_id() Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:54 ` [patch V4 19/41] x86/apic: Use u32 for [gs]et_apic_id() Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:54 ` Thomas Gleixner [this message]
2023-10-13 9:38 ` [tip: x86/core] x86/apic: Use u32 for wakeup_secondary_cpu[_64]() tip-bot2 for Thomas Gleixner
2023-10-13 10:32 ` [tip: x86/core] x86/apic, x86/hyperv: Use u32 in hv_snp_boot_ap() too tip-bot2 for Ingo Molnar
2023-08-14 8:54 ` [patch V4 21/41] x86/cpu/topology: Cure the abuse of cpuinfo for persisting logical ids Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:54 ` [patch V4 22/41] x86/cpu: Provide debug interface Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:54 ` [patch V4 23/41] x86/cpu: Provide cpuid_read() et al Thomas Gleixner
2023-08-14 8:54 ` [patch V4 24/41] x86/cpu: Provide cpu_init/parse_topology() Thomas Gleixner
2023-08-28 6:07 ` K Prateek Nayak
2023-08-28 10:05 ` Thomas Gleixner
2023-08-28 14:03 ` Arjan van de Ven
2023-08-28 14:28 ` K Prateek Nayak
2023-08-28 14:34 ` Arjan van de Ven
2023-08-29 3:16 ` K Prateek Nayak
2023-09-15 11:54 ` Peter Zijlstra
2023-09-15 14:04 ` Arjan van de Ven
2023-09-19 3:54 ` K Prateek Nayak
2023-09-19 8:13 ` Thomas Gleixner
2023-09-20 3:23 ` K Prateek Nayak
2023-09-19 13:44 ` Arjan van de Ven
2023-09-20 3:21 ` K Prateek Nayak
2023-09-14 9:20 ` K Prateek Nayak
2023-09-15 11:46 ` Thomas Gleixner
2023-08-14 8:54 ` [patch V4 25/41] x86/cpu: Add legacy topology parser Thomas Gleixner
2023-08-14 8:54 ` [patch V4 26/41] x86/cpu: Use common topology code for Centaur and Zhaoxin Thomas Gleixner
2023-08-14 8:54 ` [patch V4 27/41] x86/cpu: Move __max_die_per_package to common.c Thomas Gleixner
2023-08-14 8:54 ` [patch V4 28/41] x86/cpu: Provide a sane leaf 0xb/0x1f parser Thomas Gleixner
2023-08-16 12:09 ` Zhang, Rui
2023-08-17 9:11 ` Thomas Gleixner
2023-08-14 8:54 ` [patch V4 29/41] x86/cpu: Use common topology code for Intel Thomas Gleixner
2023-08-14 8:54 ` [patch V4 30/41] x86/cpu/amd: Provide a separate accessor for Node ID Thomas Gleixner
2023-08-14 8:54 ` [patch V4 31/41] x86/cpu: Provide an AMD/HYGON specific topology parser Thomas Gleixner
2023-08-14 8:54 ` [patch V4 32/41] x86/smpboot: Teach it about topo.amd_node_id Thomas Gleixner
2023-08-14 8:54 ` [patch V4 33/41] x86/cpu: Use common topology code for AMD Thomas Gleixner
2023-08-14 8:54 ` [patch V4 34/41] x86/cpu: Use common topology code for HYGON Thomas Gleixner
2023-08-14 8:54 ` [patch V4 35/41] x86/mm/numa: Use core domain size on AMD Thomas Gleixner
2023-08-14 8:54 ` [patch V4 36/41] x86/cpu: Make topology_amd_node_id() use the actual node info Thomas Gleixner
2023-08-14 8:54 ` [patch V4 37/41] x86/cpu: Remove topology.c Thomas Gleixner
2023-08-14 8:54 ` [patch V4 38/41] x86/cpu: Remove x86_coreid_bits Thomas Gleixner
2023-08-14 8:54 ` [patch V4 39/41] x86/apic: Remove unused phys_pkg_id() callback Thomas Gleixner
2023-08-14 8:54 ` [patch V4 40/41] x86/xen/smp_pv: Remove cpudata fiddling Thomas Gleixner
2023-08-14 8:54 ` [patch V4 41/41] x86/apic/uv: Remove the private leaf 0xb parser Thomas Gleixner
2023-08-14 14:36 ` [patch V4 00/41] x86/cpu: Rework the topology evaluation Peter Zijlstra
2023-08-16 11:36 ` Zhang, Rui
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