* [PATCH 0/3] Add support for Intel Alder Lake PCH
@ 2023-08-10 11:59 Alexander Ofitserov
2023-08-10 11:59 ` Alexander Ofitserov
` (3 more replies)
0 siblings, 4 replies; 9+ messages in thread
From: Alexander Ofitserov @ 2023-08-10 11:59 UTC (permalink / raw)
To: oficerovas, stable, Greg Kroah-Hartman
Cc: Jean Delvare, linux-i2c, linux-kernel, linux-gpio, Linus Walleij,
Andy Shevchenko, Mika Westerberg
This patch series enables support of i2c bus for Intel Alder Lake PCH-P and PCH-M
on kernel version 5.10. These patches add ID's of Alder lake platform in these
drivers: i801, intel-lpss, pinctrl. ID's were taken from linux kernel version 5.15.
Alexander Ofitserov (3):
i2c: i801: Add support for Intel Alder Lake PCH
mfd: intel-lpss: Add Alder Lake's PCI devices IDs
pinctrl: tigerlake: Add Alder Lake-P ACPI ID
drivers/i2c/busses/i2c-i801.c | 8 +++++
drivers/mfd/intel-lpss-pci.c | 41 +++++++++++++++++++++++
drivers/pinctrl/intel/pinctrl-tigerlake.c | 1 +
3 files changed, 50 insertions(+)
--
2.33.8
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH 0/3] Add support for Intel Alder Lake PCH 2023-08-10 11:59 [PATCH 0/3] Add support for Intel Alder Lake PCH Alexander Ofitserov @ 2023-08-10 11:59 ` Alexander Ofitserov 2023-08-10 13:06 ` Greg Kroah-Hartman 2023-08-10 11:59 ` [PATCH 1/3] i2c: i801: " Alexander Ofitserov ` (2 subsequent siblings) 3 siblings, 1 reply; 9+ messages in thread From: Alexander Ofitserov @ 2023-08-10 11:59 UTC (permalink / raw) To: oficerovas, stable, Greg Kroah-Hartman Cc: Jean Delvare, linux-i2c, linux-kernel, linux-gpio, Linus Walleij, Andy Shevchenko, Mika Westerberg This patch series enables support of i2c bus for Intel Alder Lake PCH-P and PCH-M on kernel version 5.10. These patches add ID's of Alder lake platform in these drivers: i801, intel-lpss, pinctrl. ID's were taken from linux kernel version 5.15. Alexander Ofitserov (3): i2c: i801: Add support for Intel Alder Lake PCH mfd: intel-lpss: Add Alder Lake's PCI devices IDs pinctrl: tigerlake: Add Alder Lake-P ACPI ID drivers/i2c/busses/i2c-i801.c | 8 +++++ drivers/mfd/intel-lpss-pci.c | 41 +++++++++++++++++++++++ drivers/pinctrl/intel/pinctrl-tigerlake.c | 1 + 3 files changed, 50 insertions(+) -- 2.33.8 ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 0/3] Add support for Intel Alder Lake PCH 2023-08-10 11:59 ` Alexander Ofitserov @ 2023-08-10 13:06 ` Greg Kroah-Hartman 0 siblings, 0 replies; 9+ messages in thread From: Greg Kroah-Hartman @ 2023-08-10 13:06 UTC (permalink / raw) To: Alexander Ofitserov Cc: stable, Jean Delvare, linux-i2c, linux-kernel, linux-gpio, Linus Walleij, Andy Shevchenko, Mika Westerberg On Thu, Aug 10, 2023 at 02:59:35PM +0300, Alexander Ofitserov wrote: > This patch series enables support of i2c bus for Intel Alder Lake PCH-P and PCH-M > on kernel version 5.10. These patches add ID's of Alder lake platform in these > drivers: i801, intel-lpss, pinctrl. ID's were taken from linux kernel version 5.15. > > Alexander Ofitserov (3): > i2c: i801: Add support for Intel Alder Lake PCH > mfd: intel-lpss: Add Alder Lake's PCI devices IDs > pinctrl: tigerlake: Add Alder Lake-P ACPI ID > > drivers/i2c/busses/i2c-i801.c | 8 +++++ > drivers/mfd/intel-lpss-pci.c | 41 +++++++++++++++++++++++ > drivers/pinctrl/intel/pinctrl-tigerlake.c | 1 + > 3 files changed, 50 insertions(+) > > -- > 2.33.8 > I'm confused, why was this sent 3 times, yet no actual patches were sent? And you have read how to get patches into the stable kernels: https://www.kernel.org/doc/html/latest/process/stable-kernel-rules.html thanks, greg k-h ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 1/3] i2c: i801: Add support for Intel Alder Lake PCH 2023-08-10 11:59 [PATCH 0/3] Add support for Intel Alder Lake PCH Alexander Ofitserov 2023-08-10 11:59 ` Alexander Ofitserov @ 2023-08-10 11:59 ` Alexander Ofitserov 2023-08-10 11:59 ` [PATCH 2/3] mfd: intel-lpss: Add Alder Lake's PCI devices IDs Alexander Ofitserov 2023-08-10 11:59 ` [PATCH 3/3] pinctrl: tigerlake: Add Alder Lake-P ACPI ID Alexander Ofitserov 3 siblings, 0 replies; 9+ messages in thread From: Alexander Ofitserov @ 2023-08-10 11:59 UTC (permalink / raw) To: oficerovas, Jean Delvare; +Cc: linux-i2c, linux-kernel Add PCI ID of SMBus controller on Intel Alder Lake PCH-P and PCH-M Signed-off-by: Alexander Ofitserov <oficerovas@altlinux.org> --- drivers/i2c/busses/i2c-i801.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c index 45682d30d70567..8ca530ef3ba6f6 100644 --- a/drivers/i2c/busses/i2c-i801.c +++ b/drivers/i2c/busses/i2c-i801.c @@ -72,6 +72,8 @@ * Jasper Lake (SOC) 0x4da3 32 hard yes yes yes * Comet Lake-V (PCH) 0xa3a3 32 hard yes yes yes * Alder Lake-S (PCH) 0x7aa3 32 hard yes yes yes + * Alder Lake-P (PCH) 0x51a3 32 hard yes yes yes + * Alder Lake-M (PCH) 0x54a3 32 hard yes yes yes * * Features supported by this driver: * Software PEC no @@ -228,6 +230,8 @@ #define PCI_DEVICE_ID_INTEL_TIGERLAKE_H_SMBUS 0x43a3 #define PCI_DEVICE_ID_INTEL_ELKHART_LAKE_SMBUS 0x4b23 #define PCI_DEVICE_ID_INTEL_JASPER_LAKE_SMBUS 0x4da3 +#define PCI_DEVICE_ID_INTEL_ALDER_LAKE_P_SMBUS 0x51a3 +#define PCI_DEVICE_ID_INTEL_ALDER_LAKE_M_SMBUS 0x54a3 #define PCI_DEVICE_ID_INTEL_BROXTON_SMBUS 0x5ad4 #define PCI_DEVICE_ID_INTEL_ALDER_LAKE_S_SMBUS 0x7aa3 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS 0x8c22 @@ -1080,6 +1084,8 @@ static const struct pci_device_id i801_ids[] = { { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TIGERLAKE_H_SMBUS) }, { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_JASPER_LAKE_SMBUS) }, { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ALDER_LAKE_S_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ALDER_LAKE_P_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ALDER_LAKE_M_SMBUS) }, { 0, } }; @@ -1769,6 +1775,8 @@ static int i801_probe(struct pci_dev *dev, const struct pci_device_id *id) case PCI_DEVICE_ID_INTEL_JASPER_LAKE_SMBUS: case PCI_DEVICE_ID_INTEL_EBG_SMBUS: case PCI_DEVICE_ID_INTEL_ALDER_LAKE_S_SMBUS: + case PCI_DEVICE_ID_INTEL_ALDER_LAKE_P_SMBUS: + case PCI_DEVICE_ID_INTEL_ALDER_LAKE_M_SMBUS: priv->features |= FEATURE_BLOCK_PROC; priv->features |= FEATURE_I2C_BLOCK_READ; priv->features |= FEATURE_IRQ; -- 2.33.8 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 2/3] mfd: intel-lpss: Add Alder Lake's PCI devices IDs 2023-08-10 11:59 [PATCH 0/3] Add support for Intel Alder Lake PCH Alexander Ofitserov 2023-08-10 11:59 ` Alexander Ofitserov 2023-08-10 11:59 ` [PATCH 1/3] i2c: i801: " Alexander Ofitserov @ 2023-08-10 11:59 ` Alexander Ofitserov [not found] ` <d70c4ffa-2493-9c2e-a526-8006f4108cbf@basealt.ru> 2023-08-10 11:59 ` [PATCH 3/3] pinctrl: tigerlake: Add Alder Lake-P ACPI ID Alexander Ofitserov 3 siblings, 1 reply; 9+ messages in thread From: Alexander Ofitserov @ 2023-08-10 11:59 UTC (permalink / raw) To: oficerovas, Lee Jones; +Cc: linux-kernel Intel Alder Lake PCH has the same LPSS as Intel Broxton. Add the new IDs to the list of supported devices. Signed-off-by: Alexander Ofitserov <oficerovas@altlinux.org> --- drivers/mfd/intel-lpss-pci.c | 41 ++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/drivers/mfd/intel-lpss-pci.c b/drivers/mfd/intel-lpss-pci.c index 2d7c588ef1edaa..dc0292aa2e6e42 100644 --- a/drivers/mfd/intel-lpss-pci.c +++ b/drivers/mfd/intel-lpss-pci.c @@ -277,6 +277,32 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { { PCI_VDEVICE(INTEL, 0x4dea), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x4deb), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x4dfb), (kernel_ulong_t)&spt_info }, + /* ADL-P */ + { PCI_VDEVICE(INTEL, 0x51a8), (kernel_ulong_t)&bxt_uart_info }, + { PCI_VDEVICE(INTEL, 0x51a9), (kernel_ulong_t)&bxt_uart_info }, + { PCI_VDEVICE(INTEL, 0x51aa), (kernel_ulong_t)&bxt_info }, + { PCI_VDEVICE(INTEL, 0x51ab), (kernel_ulong_t)&bxt_info }, + { PCI_VDEVICE(INTEL, 0x51c5), (kernel_ulong_t)&bxt_i2c_info }, + { PCI_VDEVICE(INTEL, 0x51c6), (kernel_ulong_t)&bxt_i2c_info }, + { PCI_VDEVICE(INTEL, 0x51c7), (kernel_ulong_t)&bxt_uart_info }, + { PCI_VDEVICE(INTEL, 0x51e8), (kernel_ulong_t)&bxt_i2c_info }, + { PCI_VDEVICE(INTEL, 0x51e9), (kernel_ulong_t)&bxt_i2c_info }, + { PCI_VDEVICE(INTEL, 0x51ea), (kernel_ulong_t)&bxt_i2c_info }, + { PCI_VDEVICE(INTEL, 0x51eb), (kernel_ulong_t)&bxt_i2c_info }, + { PCI_VDEVICE(INTEL, 0x51fb), (kernel_ulong_t)&bxt_info }, + /* ADL-M */ + { PCI_VDEVICE(INTEL, 0x54a8), (kernel_ulong_t)&bxt_uart_info }, + { PCI_VDEVICE(INTEL, 0x54a9), (kernel_ulong_t)&bxt_uart_info }, + { PCI_VDEVICE(INTEL, 0x54aa), (kernel_ulong_t)&bxt_info }, + { PCI_VDEVICE(INTEL, 0x54ab), (kernel_ulong_t)&bxt_info }, + { PCI_VDEVICE(INTEL, 0x54c5), (kernel_ulong_t)&bxt_i2c_info }, + { PCI_VDEVICE(INTEL, 0x54c6), (kernel_ulong_t)&bxt_i2c_info }, + { PCI_VDEVICE(INTEL, 0x54c7), (kernel_ulong_t)&bxt_uart_info }, + { PCI_VDEVICE(INTEL, 0x54e8), (kernel_ulong_t)&bxt_i2c_info }, + { PCI_VDEVICE(INTEL, 0x54e9), (kernel_ulong_t)&bxt_i2c_info }, + { PCI_VDEVICE(INTEL, 0x54ea), (kernel_ulong_t)&bxt_i2c_info }, + { PCI_VDEVICE(INTEL, 0x54eb), (kernel_ulong_t)&bxt_i2c_info }, + { PCI_VDEVICE(INTEL, 0x54fb), (kernel_ulong_t)&bxt_info }, /* APL */ { PCI_VDEVICE(INTEL, 0x5aac), (kernel_ulong_t)&apl_i2c_info }, { PCI_VDEVICE(INTEL, 0x5aae), (kernel_ulong_t)&apl_i2c_info }, @@ -293,6 +319,21 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { { PCI_VDEVICE(INTEL, 0x5ac4), (kernel_ulong_t)&bxt_info }, { PCI_VDEVICE(INTEL, 0x5ac6), (kernel_ulong_t)&bxt_info }, { PCI_VDEVICE(INTEL, 0x5aee), (kernel_ulong_t)&bxt_uart_info }, + /* ADL-S */ + { PCI_VDEVICE(INTEL, 0x7aa8), (kernel_ulong_t)&bxt_uart_info }, + { PCI_VDEVICE(INTEL, 0x7aa9), (kernel_ulong_t)&bxt_uart_info }, + { PCI_VDEVICE(INTEL, 0x7aaa), (kernel_ulong_t)&bxt_info }, + { PCI_VDEVICE(INTEL, 0x7aab), (kernel_ulong_t)&bxt_info }, + { PCI_VDEVICE(INTEL, 0x7acc), (kernel_ulong_t)&bxt_i2c_info }, + { PCI_VDEVICE(INTEL, 0x7acd), (kernel_ulong_t)&bxt_i2c_info }, + { PCI_VDEVICE(INTEL, 0x7ace), (kernel_ulong_t)&bxt_i2c_info }, + { PCI_VDEVICE(INTEL, 0x7acf), (kernel_ulong_t)&bxt_i2c_info }, + { PCI_VDEVICE(INTEL, 0x7adc), (kernel_ulong_t)&bxt_uart_info }, + { PCI_VDEVICE(INTEL, 0x7af9), (kernel_ulong_t)&bxt_info }, + { PCI_VDEVICE(INTEL, 0x7afb), (kernel_ulong_t)&bxt_info }, + { PCI_VDEVICE(INTEL, 0x7afc), (kernel_ulong_t)&bxt_i2c_info }, + { PCI_VDEVICE(INTEL, 0x7afd), (kernel_ulong_t)&bxt_i2c_info }, + { PCI_VDEVICE(INTEL, 0x7afe), (kernel_ulong_t)&bxt_uart_info }, /* LKF */ { PCI_VDEVICE(INTEL, 0x98a8), (kernel_ulong_t)&bxt_uart_info }, { PCI_VDEVICE(INTEL, 0x98a9), (kernel_ulong_t)&bxt_uart_info }, -- 2.33.8 ^ permalink raw reply related [flat|nested] 9+ messages in thread
[parent not found: <d70c4ffa-2493-9c2e-a526-8006f4108cbf@basealt.ru>]
* Re: Fwd: [PATCH 2/3] mfd: intel-lpss: Add Alder Lake's PCI devices IDs [not found] ` <d70c4ffa-2493-9c2e-a526-8006f4108cbf@basealt.ru> @ 2023-08-15 16:58 ` Lee Jones 0 siblings, 0 replies; 9+ messages in thread From: Lee Jones @ 2023-08-15 16:58 UTC (permalink / raw) To: Александр Офицеров Cc: linux-kernel On Thu, 10 Aug 2023, Александр Офицеров wrote: > [PATCH 2/3] mfd: intel-lpss: Add Alder Lake's PCI devices IDs > > I've sent patch to email address which is not monitored now, so I am > forwarding this email to the correct address That doesn't work. Please resend it properly as a [RESEND]. > -------- Перенаправленное сообщение -------- > Тема: [PATCH 2/3] mfd: intel-lpss: Add Alder Lake's PCI devices IDs > Дата: Thu, 10 Aug 2023 14:59:37 +0300 > От: Alexander Ofitserov <oficerovas@altlinux.org> > Кому: oficerovas@altlinux.org, Lee Jones <lee.jones@linaro.org> > Копия: linux-kernel@vger.kernel.org > > > > Intel Alder Lake PCH has the same LPSS as Intel Broxton. > Add the new IDs to the list of supported devices. > > Signed-off-by: Alexander Ofitserov <oficerovas@altlinux.org> > --- > drivers/mfd/intel-lpss-pci.c | 41 ++++++++++++++++++++++++++++++++++++ > 1 file changed, 41 insertions(+) > > diff --git a/drivers/mfd/intel-lpss-pci.c b/drivers/mfd/intel-lpss-pci.c > index 2d7c588ef1edaa..dc0292aa2e6e42 100644 > --- a/drivers/mfd/intel-lpss-pci.c > +++ b/drivers/mfd/intel-lpss-pci.c > @@ -277,6 +277,32 @@ static const struct pci_device_id intel_lpss_pci_ids[] > = { > { PCI_VDEVICE(INTEL, 0x4dea), (kernel_ulong_t)&bxt_i2c_info }, > { PCI_VDEVICE(INTEL, 0x4deb), (kernel_ulong_t)&bxt_i2c_info }, > { PCI_VDEVICE(INTEL, 0x4dfb), (kernel_ulong_t)&spt_info }, > + /* ADL-P */ > + { PCI_VDEVICE(INTEL, 0x51a8), (kernel_ulong_t)&bxt_uart_info }, > + { PCI_VDEVICE(INTEL, 0x51a9), (kernel_ulong_t)&bxt_uart_info }, > + { PCI_VDEVICE(INTEL, 0x51aa), (kernel_ulong_t)&bxt_info }, > + { PCI_VDEVICE(INTEL, 0x51ab), (kernel_ulong_t)&bxt_info }, > + { PCI_VDEVICE(INTEL, 0x51c5), (kernel_ulong_t)&bxt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x51c6), (kernel_ulong_t)&bxt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x51c7), (kernel_ulong_t)&bxt_uart_info }, > + { PCI_VDEVICE(INTEL, 0x51e8), (kernel_ulong_t)&bxt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x51e9), (kernel_ulong_t)&bxt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x51ea), (kernel_ulong_t)&bxt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x51eb), (kernel_ulong_t)&bxt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x51fb), (kernel_ulong_t)&bxt_info }, > + /* ADL-M */ > + { PCI_VDEVICE(INTEL, 0x54a8), (kernel_ulong_t)&bxt_uart_info }, > + { PCI_VDEVICE(INTEL, 0x54a9), (kernel_ulong_t)&bxt_uart_info }, > + { PCI_VDEVICE(INTEL, 0x54aa), (kernel_ulong_t)&bxt_info }, > + { PCI_VDEVICE(INTEL, 0x54ab), (kernel_ulong_t)&bxt_info }, > + { PCI_VDEVICE(INTEL, 0x54c5), (kernel_ulong_t)&bxt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x54c6), (kernel_ulong_t)&bxt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x54c7), (kernel_ulong_t)&bxt_uart_info }, > + { PCI_VDEVICE(INTEL, 0x54e8), (kernel_ulong_t)&bxt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x54e9), (kernel_ulong_t)&bxt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x54ea), (kernel_ulong_t)&bxt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x54eb), (kernel_ulong_t)&bxt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x54fb), (kernel_ulong_t)&bxt_info }, > /* APL */ > { PCI_VDEVICE(INTEL, 0x5aac), (kernel_ulong_t)&apl_i2c_info }, > { PCI_VDEVICE(INTEL, 0x5aae), (kernel_ulong_t)&apl_i2c_info }, > @@ -293,6 +319,21 @@ static const struct pci_device_id intel_lpss_pci_ids[] > = { > { PCI_VDEVICE(INTEL, 0x5ac4), (kernel_ulong_t)&bxt_info }, > { PCI_VDEVICE(INTEL, 0x5ac6), (kernel_ulong_t)&bxt_info }, > { PCI_VDEVICE(INTEL, 0x5aee), (kernel_ulong_t)&bxt_uart_info }, > + /* ADL-S */ > + { PCI_VDEVICE(INTEL, 0x7aa8), (kernel_ulong_t)&bxt_uart_info }, > + { PCI_VDEVICE(INTEL, 0x7aa9), (kernel_ulong_t)&bxt_uart_info }, > + { PCI_VDEVICE(INTEL, 0x7aaa), (kernel_ulong_t)&bxt_info }, > + { PCI_VDEVICE(INTEL, 0x7aab), (kernel_ulong_t)&bxt_info }, > + { PCI_VDEVICE(INTEL, 0x7acc), (kernel_ulong_t)&bxt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x7acd), (kernel_ulong_t)&bxt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x7ace), (kernel_ulong_t)&bxt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x7acf), (kernel_ulong_t)&bxt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x7adc), (kernel_ulong_t)&bxt_uart_info }, > + { PCI_VDEVICE(INTEL, 0x7af9), (kernel_ulong_t)&bxt_info }, > + { PCI_VDEVICE(INTEL, 0x7afb), (kernel_ulong_t)&bxt_info }, > + { PCI_VDEVICE(INTEL, 0x7afc), (kernel_ulong_t)&bxt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x7afd), (kernel_ulong_t)&bxt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x7afe), (kernel_ulong_t)&bxt_uart_info }, > /* LKF */ > { PCI_VDEVICE(INTEL, 0x98a8), (kernel_ulong_t)&bxt_uart_info }, > { PCI_VDEVICE(INTEL, 0x98a9), (kernel_ulong_t)&bxt_uart_info }, > > -- > 2.33.8 -- Lee Jones [李琼斯] ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 3/3] pinctrl: tigerlake: Add Alder Lake-P ACPI ID 2023-08-10 11:59 [PATCH 0/3] Add support for Intel Alder Lake PCH Alexander Ofitserov ` (2 preceding siblings ...) 2023-08-10 11:59 ` [PATCH 2/3] mfd: intel-lpss: Add Alder Lake's PCI devices IDs Alexander Ofitserov @ 2023-08-10 11:59 ` Alexander Ofitserov 2023-08-11 5:07 ` Mika Westerberg 3 siblings, 1 reply; 9+ messages in thread From: Alexander Ofitserov @ 2023-08-10 11:59 UTC (permalink / raw) To: oficerovas, Mika Westerberg, Andy Shevchenko, Linus Walleij Cc: linux-gpio, linux-kernel Intel Alder Lake-P has the same pin layout as the Tiget Lake-LP so add support for this to the existing Tiger Lake driver. Signed-off-by: Alexander Ofitserov <oficerovas@altlinux.org> --- drivers/pinctrl/intel/pinctrl-tigerlake.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pinctrl/intel/pinctrl-tigerlake.c b/drivers/pinctrl/intel/pinctrl-tigerlake.c index bed769d99b8be0..3ddaeffc04150a 100644 --- a/drivers/pinctrl/intel/pinctrl-tigerlake.c +++ b/drivers/pinctrl/intel/pinctrl-tigerlake.c @@ -748,6 +748,7 @@ static const struct intel_pinctrl_soc_data tglh_soc_data = { static const struct acpi_device_id tgl_pinctrl_acpi_match[] = { { "INT34C5", (kernel_ulong_t)&tgllp_soc_data }, { "INT34C6", (kernel_ulong_t)&tglh_soc_data }, + { "INTC1055", (kernel_ulong_t)&tgllp_soc_data }, { } }; MODULE_DEVICE_TABLE(acpi, tgl_pinctrl_acpi_match); -- 2.33.8 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 3/3] pinctrl: tigerlake: Add Alder Lake-P ACPI ID 2023-08-10 11:59 ` [PATCH 3/3] pinctrl: tigerlake: Add Alder Lake-P ACPI ID Alexander Ofitserov @ 2023-08-11 5:07 ` Mika Westerberg 2023-08-11 9:16 ` Andy Shevchenko 0 siblings, 1 reply; 9+ messages in thread From: Mika Westerberg @ 2023-08-11 5:07 UTC (permalink / raw) To: Alexander Ofitserov Cc: Andy Shevchenko, Linus Walleij, linux-gpio, linux-kernel On Thu, Aug 10, 2023 at 02:59:38PM +0300, Alexander Ofitserov wrote: > Intel Alder Lake-P has the same pin layout as the Tiget Lake-LP > so add support for this to the existing Tiger Lake driver. Isn't it the same as Alder Lake-N so this ID should be added to the pinctrl-alderlake.c instead? Andy, do you know? ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 3/3] pinctrl: tigerlake: Add Alder Lake-P ACPI ID 2023-08-11 5:07 ` Mika Westerberg @ 2023-08-11 9:16 ` Andy Shevchenko 0 siblings, 0 replies; 9+ messages in thread From: Andy Shevchenko @ 2023-08-11 9:16 UTC (permalink / raw) To: Mika Westerberg Cc: Alexander Ofitserov, Linus Walleij, linux-gpio, linux-kernel On Fri, Aug 11, 2023 at 08:07:28AM +0300, Mika Westerberg wrote: > On Thu, Aug 10, 2023 at 02:59:38PM +0300, Alexander Ofitserov wrote: > > Intel Alder Lake-P has the same pin layout as the Tiget Lake-LP > > so add support for this to the existing Tiger Lake driver. > > Isn't it the same as Alder Lake-N so this ID should be added to the > pinctrl-alderlake.c instead? Andy, do you know? This is for v5.10 stable kernel. We need not to worry :-) -- With Best Regards, Andy Shevchenko ^ permalink raw reply [flat|nested] 9+ messages in thread
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2023-08-10 11:59 [PATCH 0/3] Add support for Intel Alder Lake PCH Alexander Ofitserov
2023-08-10 11:59 ` Alexander Ofitserov
2023-08-10 13:06 ` Greg Kroah-Hartman
2023-08-10 11:59 ` [PATCH 1/3] i2c: i801: " Alexander Ofitserov
2023-08-10 11:59 ` [PATCH 2/3] mfd: intel-lpss: Add Alder Lake's PCI devices IDs Alexander Ofitserov
[not found] ` <d70c4ffa-2493-9c2e-a526-8006f4108cbf@basealt.ru>
2023-08-15 16:58 ` Fwd: " Lee Jones
2023-08-10 11:59 ` [PATCH 3/3] pinctrl: tigerlake: Add Alder Lake-P ACPI ID Alexander Ofitserov
2023-08-11 5:07 ` Mika Westerberg
2023-08-11 9:16 ` Andy Shevchenko
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