Re: [PATCH] riscv: dts: thead: set dma-noncoherent to soc bus

Drew Fustini
2023-09-03T23:32:27Z

On Sun, Aug 20, 2023 at 07:53:53PM +0800, Jisheng Zhang wrote:
> riscv select ARCH_DMA_DEFAULT_COHERENT by default, and th1520 isn't
> dma coherent, so set dma-noncoherent to reflect this fact.
>
> Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
> ---
> arch/riscv/boot/dts/thead/th1520.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
> index 56a73134b49e..58108f0eb3fd 100644
> --- a/arch/riscv/boot/dts/thead/th1520.dtsi
> +++ b/arch/riscv/boot/dts/thead/th1520.dtsi
> @@ -139,6 +139,7 @@ soc {
> interrupt-parent = <&plic>;
> #address-cells = <2>;
> #size-cells = <2>;
> + dma-noncoherent;
> ranges;
>
> plic: interrupt-controller@ffd8000000 {
> --
> 2.40.1
>

Tested-by: Drew Fustini <dfustini@baylibre.com>

I tried this on the BeagleV Ahead. They system booted as expected and I
did not notice any problems in the boot log.

Are there other patches such as the dwmac series that I should test this
with?

Also, I think this might have missed patchwork since the original email
had a typo for the list, so it might be good to resend it?

Thanks,
Drew