From: Alex Bee <knaerzche@gmail.com>
To: Heiko Stuebner <heiko@sntech.de>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
Lee Jones <lee@kernel.org>, Liam Girdwood <lgirdwood@gmail.com>,
Mark Brown <broonie@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>
Cc: Elaine Zhang <zhangqing@rock-chips.com>,
Johan Jonker <jbx6244@gmail.com>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
dri-devel@lists.freedesktop.org, alsa-devel@alsa-project.org,
linux-clk@vger.kernel.org, linux-phy@lists.infradead.org,
Alex Bee <knaerzche@gmail.com>
Subject: [PATCH 08/31] phy: rockchip-inno-usb2: Split ID interrupt phy registers
Date: Tue, 29 Aug 2023 19:16:24 +0200 [thread overview]
Message-ID: <20230829171647.187787-9-knaerzche@gmail.com> (raw)
In-Reply-To: <20230829171647.187787-1-knaerzche@gmail.com>
Commit 51a9b2c03dd3 ("phy: rockchip-inno-usb2: Handle ID IRQ") added ID
detection interrupt registers. However the current implementation assumes
that falling and rising edge interrupt are always enabled in registers
spaning over subsequent bits.
That is not the case for RK312x's version of the phy and this
implementation can't be used as-is, since there are bits with different
purpose in between.
This splits up the register definitions for id_det_en, id_det_en and
id_det_clr registers in rising and falling edge variants.
It's required as preparation to support RK312x's Innosilicon usb2 phy as
well in this driver and matches pretty much to what the vendor does, so I'm
not expecting issues for other SoCs with that change.
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 99 +++++++++++++------
1 file changed, 70 insertions(+), 29 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
index a0bc10aa7961..a4a1716e67bd 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -116,9 +116,12 @@ struct rockchip_chg_det_reg {
* @bvalid_det_en: vbus valid rise detection enable register.
* @bvalid_det_st: vbus valid rise detection status register.
* @bvalid_det_clr: vbus valid rise detection clear register.
- * @id_det_en: id detection enable register.
- * @id_det_st: id detection state register.
- * @id_det_clr: id detection clear register.
+ * @idfall_det_en: id detection enable register, falling edge
+ * @idfall_det_st: id detection state register, falling edge
+ * @idfall_det_clr: id detection clear register, falling edge
+ * @idrise_det_en: id detection enable register, rising edge
+ * @idrise_det_st: id detection state register, rising edge
+ * @idrise_det_clr: id detection clear register, rising edge
* @ls_det_en: linestate detection enable register.
* @ls_det_st: linestate detection state register.
* @ls_det_clr: linestate detection clear register.
@@ -133,9 +136,12 @@ struct rockchip_usb2phy_port_cfg {
struct usb2phy_reg bvalid_det_en;
struct usb2phy_reg bvalid_det_st;
struct usb2phy_reg bvalid_det_clr;
- struct usb2phy_reg id_det_en;
- struct usb2phy_reg id_det_st;
- struct usb2phy_reg id_det_clr;
+ struct usb2phy_reg idfall_det_en;
+ struct usb2phy_reg idfall_det_st;
+ struct usb2phy_reg idfall_det_clr;
+ struct usb2phy_reg idrise_det_en;
+ struct usb2phy_reg idrise_det_st;
+ struct usb2phy_reg idrise_det_clr;
struct usb2phy_reg ls_det_en;
struct usb2phy_reg ls_det_st;
struct usb2phy_reg ls_det_clr;
@@ -429,15 +435,27 @@ static int rockchip_usb2phy_init(struct phy *phy)
if (ret)
goto out;
- /* clear id status and enable id detect irq */
+ /* clear id status and enable id detect irqs */
ret = property_enable(rphy->grf,
- &rport->port_cfg->id_det_clr,
+ &rport->port_cfg->idfall_det_clr,
true);
if (ret)
goto out;
ret = property_enable(rphy->grf,
- &rport->port_cfg->id_det_en,
+ &rport->port_cfg->idrise_det_clr,
+ true);
+ if (ret)
+ goto out;
+
+ ret = property_enable(rphy->grf,
+ &rport->port_cfg->idfall_det_en,
+ true);
+ if (ret)
+ goto out;
+
+ ret = property_enable(rphy->grf,
+ &rport->port_cfg->idrise_det_en,
true);
if (ret)
goto out;
@@ -944,11 +962,16 @@ static irqreturn_t rockchip_usb2phy_id_irq(int irq, void *data)
struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent);
bool id;
- if (!property_enabled(rphy->grf, &rport->port_cfg->id_det_st))
+ if (!property_enabled(rphy->grf, &rport->port_cfg->idfall_det_st) &&
+ !property_enabled(rphy->grf, &rport->port_cfg->idrise_det_st))
return IRQ_NONE;
/* clear id detect irq pending status */
- property_enable(rphy->grf, &rport->port_cfg->id_det_clr, true);
+ if (property_enabled(rphy->grf, &rport->port_cfg->idfall_det_st))
+ property_enable(rphy->grf, &rport->port_cfg->idfall_det_clr, true);
+
+ if (property_enabled(rphy->grf, &rport->port_cfg->idrise_det_st))
+ property_enable(rphy->grf, &rport->port_cfg->idrise_det_clr, true);
id = property_enabled(rphy->grf, &rport->port_cfg->utmi_id);
extcon_set_state_sync(rphy->edev, EXTCON_USB_HOST, !id);
@@ -1362,9 +1385,12 @@ static const struct rockchip_usb2phy_cfg rk3228_phy_cfgs[] = {
.bvalid_det_en = { 0x0680, 3, 3, 0, 1 },
.bvalid_det_st = { 0x0690, 3, 3, 0, 1 },
.bvalid_det_clr = { 0x06a0, 3, 3, 0, 1 },
- .id_det_en = { 0x0680, 6, 5, 0, 3 },
- .id_det_st = { 0x0690, 6, 5, 0, 3 },
- .id_det_clr = { 0x06a0, 6, 5, 0, 3 },
+ .idfall_det_en = { 0x0680, 6, 6, 0, 1 },
+ .idfall_det_st = { 0x0690, 6, 6, 0, 1 },
+ .idfall_det_clr = { 0x06a0, 6, 6, 0, 1 },
+ .idrise_det_en = { 0x0680, 5, 5, 0, 1 },
+ .idrise_det_st = { 0x0690, 5, 5, 0, 1 },
+ .idrise_det_clr = { 0x06a0, 5, 5, 0, 1 },
.ls_det_en = { 0x0680, 2, 2, 0, 1 },
.ls_det_st = { 0x0690, 2, 2, 0, 1 },
.ls_det_clr = { 0x06a0, 2, 2, 0, 1 },
@@ -1425,9 +1451,12 @@ static const struct rockchip_usb2phy_cfg rk3308_phy_cfgs[] = {
.bvalid_det_en = { 0x3020, 3, 2, 0, 3 },
.bvalid_det_st = { 0x3024, 3, 2, 0, 3 },
.bvalid_det_clr = { 0x3028, 3, 2, 0, 3 },
- .id_det_en = { 0x3020, 5, 4, 0, 3 },
- .id_det_st = { 0x3024, 5, 4, 0, 3 },
- .id_det_clr = { 0x3028, 5, 4, 0, 3 },
+ .idfall_det_en = { 0x3020, 5, 5, 0, 1 },
+ .idfall_det_st = { 0x3024, 5, 5, 0, 1 },
+ .idfall_det_clr = { 0x3028, 5, 5, 0, 1 },
+ .idrise_det_en = { 0x3020, 4, 4, 0, 1 },
+ .idrise_det_st = { 0x3024, 4, 4, 0, 1 },
+ .idrise_det_clr = { 0x3028, 4, 4, 0, 1 },
.ls_det_en = { 0x3020, 0, 0, 0, 1 },
.ls_det_st = { 0x3024, 0, 0, 0, 1 },
.ls_det_clr = { 0x3028, 0, 0, 0, 1 },
@@ -1472,9 +1501,12 @@ static const struct rockchip_usb2phy_cfg rk3328_phy_cfgs[] = {
.bvalid_det_en = { 0x0110, 3, 2, 0, 3 },
.bvalid_det_st = { 0x0114, 3, 2, 0, 3 },
.bvalid_det_clr = { 0x0118, 3, 2, 0, 3 },
- .id_det_en = { 0x0110, 5, 4, 0, 3 },
- .id_det_st = { 0x0114, 5, 4, 0, 3 },
- .id_det_clr = { 0x0118, 5, 4, 0, 3 },
+ .idfall_det_en = { 0x0110, 5, 5, 0, 1 },
+ .idfall_det_st = { 0x0114, 5, 5, 0, 1 },
+ .idfall_det_clr = { 0x0118, 5, 5, 0, 1 },
+ .idrise_det_en = { 0x0110, 4, 4, 0, 1 },
+ .idrise_det_st = { 0x0114, 4, 4, 0, 1 },
+ .idrise_det_clr = { 0x0118, 4, 4, 0, 1 },
.ls_det_en = { 0x0110, 0, 0, 0, 1 },
.ls_det_st = { 0x0114, 0, 0, 0, 1 },
.ls_det_clr = { 0x0118, 0, 0, 0, 1 },
@@ -1538,9 +1570,12 @@ static const struct rockchip_usb2phy_cfg rk3399_phy_cfgs[] = {
.bvalid_det_en = { 0xe3c0, 3, 3, 0, 1 },
.bvalid_det_st = { 0xe3e0, 3, 3, 0, 1 },
.bvalid_det_clr = { 0xe3d0, 3, 3, 0, 1 },
- .id_det_en = { 0xe3c0, 5, 4, 0, 3 },
- .id_det_st = { 0xe3e0, 5, 4, 0, 3 },
- .id_det_clr = { 0xe3d0, 5, 4, 0, 3 },
+ .idfall_det_en = { 0xe3c0, 5, 5, 0, 1 },
+ .idfall_det_st = { 0xe3e0, 5, 5, 0, 1 },
+ .idfall_det_clr = { 0xe3d0, 5, 5, 0, 1 },
+ .idrise_det_en = { 0xe3c0, 4, 4, 0, 1 },
+ .idrise_det_st = { 0xe3e0, 4, 4, 0, 1 },
+ .idrise_det_clr = { 0xe3d0, 4, 4, 0, 1 },
.utmi_avalid = { 0xe2ac, 7, 7, 0, 1 },
.utmi_bvalid = { 0xe2ac, 12, 12, 0, 1 },
.utmi_id = { 0xe2ac, 8, 8, 0, 1 },
@@ -1577,9 +1612,12 @@ static const struct rockchip_usb2phy_cfg rk3399_phy_cfgs[] = {
.bvalid_det_en = { 0xe3c0, 8, 8, 0, 1 },
.bvalid_det_st = { 0xe3e0, 8, 8, 0, 1 },
.bvalid_det_clr = { 0xe3d0, 8, 8, 0, 1 },
- .id_det_en = { 0xe3c0, 10, 9, 0, 3 },
- .id_det_st = { 0xe3e0, 10, 9, 0, 3 },
- .id_det_clr = { 0xe3d0, 10, 9, 0, 3 },
+ .idfall_det_en = { 0xe3c0, 10, 10, 0, 1 },
+ .idfall_det_st = { 0xe3e0, 10, 10, 0, 1 },
+ .idfall_det_clr = { 0xe3d0, 10, 10, 0, 1 },
+ .idrise_det_en = { 0xe3c0, 9, 9, 0, 1 },
+ .idrise_det_st = { 0xe3e0, 9, 9, 0, 1 },
+ .idrise_det_clr = { 0xe3d0, 9, 9, 0, 1 },
.utmi_avalid = { 0xe2ac, 10, 10, 0, 1 },
.utmi_bvalid = { 0xe2ac, 16, 16, 0, 1 },
.utmi_id = { 0xe2ac, 11, 11, 0, 1 },
@@ -1608,9 +1646,12 @@ static const struct rockchip_usb2phy_cfg rk3568_phy_cfgs[] = {
.bvalid_det_en = { 0x0080, 3, 2, 0, 3 },
.bvalid_det_st = { 0x0084, 3, 2, 0, 3 },
.bvalid_det_clr = { 0x0088, 3, 2, 0, 3 },
- .id_det_en = { 0x0080, 5, 4, 0, 3 },
- .id_det_st = { 0x0084, 5, 4, 0, 3 },
- .id_det_clr = { 0x0088, 5, 4, 0, 3 },
+ .idfall_det_en = { 0x0080, 5, 5, 0, 1 },
+ .idfall_det_st = { 0x0084, 5, 5, 0, 1 },
+ .idfall_det_clr = { 0x0088, 5, 5, 0, 1 },
+ .idrise_det_en = { 0x0080, 4, 4, 0, 1 },
+ .idrise_det_st = { 0x0084, 4, 4, 0, 1 },
+ .idrise_det_clr = { 0x0088, 4, 4, 0, 1 },
.utmi_avalid = { 0x00c0, 10, 10, 0, 1 },
.utmi_bvalid = { 0x00c0, 9, 9, 0, 1 },
.utmi_id = { 0x00c0, 6, 6, 0, 1 },
--
2.42.0
next prev parent reply other threads:[~2023-08-29 17:19 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-29 17:16 [PATCH 00/31] Fix and improve Rockchip RK3128 support Alex Bee
2023-08-29 17:16 ` [PATCH 01/31] dt-bindings: mfd: syscon: Add rockchip,rk3128-qos compatible Alex Bee
2023-08-29 17:20 ` Krzysztof Kozlowski
2023-09-20 9:36 ` (subset) " Lee Jones
2023-08-29 17:16 ` [PATCH 02/31] dt-bindings: gpu: mali-utgard: Add Rockchip RK3128 compatible Alex Bee
2023-08-29 17:20 ` Krzysztof Kozlowski
2023-08-29 17:16 ` [PATCH 03/31] dt-bindings: ASoC: rockchip: Add compatible for RK3128 spdif Alex Bee
2023-08-29 17:21 ` Krzysztof Kozlowski
2023-08-29 17:16 ` [PATCH 04/31] dt-bindings: arm: rockchip: Add Geniatech XPI-3128 Alex Bee
2023-08-29 17:22 ` Krzysztof Kozlowski
2023-08-29 17:16 ` [PATCH 05/31] clk: rockchip: rk3128: Fix aclk_peri_src parent Alex Bee
2023-08-29 17:40 ` Krzysztof Kozlowski
2023-08-29 18:36 ` Alex Bee
2023-08-29 17:16 ` [PATCH 06/31] clk: rockchip: rk3128: Fix hclk_otg gate Alex Bee
2023-08-29 17:16 ` [PATCH 07/31] clk: rockchip: rk3128: Fix SCLK_SDMMC's clock name Alex Bee
2023-08-29 17:16 ` Alex Bee [this message]
2023-09-21 13:43 ` [PATCH 08/31] phy: rockchip-inno-usb2: Split ID interrupt phy registers Vinod Koul
2023-08-29 17:16 ` [PATCH 09/31] phy: phy-rockchip-inno-usb2: Add RK3128 support Alex Bee
2023-08-29 17:16 ` [PATCH 10/31] ARM: dts: rockchip: Fix i2c0 register address for RK3128 Alex Bee
2023-08-29 17:16 ` [PATCH 11/31] ARM: dts: rockchip: Add missing arm timer interrupt " Alex Bee
2023-08-29 17:16 ` [PATCH 12/31] ARM: dts: rockchip: Add missing quirk for RK3128's dma engine Alex Bee
2023-08-29 17:16 ` [PATCH 13/31] ARM: dts: rockchip: Fix timer clocks for RK3128 Alex Bee
2023-08-29 17:16 ` [PATCH 14/31] ARM: dts: rockchip: Disable non-required timers " Alex Bee
2023-08-29 17:16 ` [PATCH 15/31] ARM: dts: rockchip: Split RK3128 devictree for RK312x SoC family Alex Bee
2023-08-29 17:24 ` Krzysztof Kozlowski
2023-08-29 17:16 ` [PATCH 16/31] ARM: dts: rockchip: Add SRAM node for RK312x Alex Bee
2023-08-29 17:25 ` Krzysztof Kozlowski
2023-08-29 17:16 ` [PATCH 17/31] ARM: dts: rockchip: Add CPU resets " Alex Bee
2023-08-29 17:25 ` Krzysztof Kozlowski
2023-08-29 17:16 ` [PATCH 18/31] ARM: dts: rockchip: Enable SMP bringup " Alex Bee
2023-08-29 17:16 ` [PATCH 19/31] ARM: dts: rockchip: Switch to operating-points-v2 for RK312x's CPU Alex Bee
2023-08-29 17:16 ` [PATCH 20/31] ARM: dts: rockchip: Add extra CPU voltages for RK3126 Alex Bee
2023-08-29 17:16 ` [PATCH 21/31] ARM: dts: rockchip: add power controller for RK312x Alex Bee
2023-08-29 17:16 ` [PATCH 22/31] ARM: dts: rockchip: Add GPU node " Alex Bee
2023-08-29 17:16 ` [PATCH 23/31] ARM: dts: rockchip: Add 2-channel I2S " Alex Bee
2023-08-29 17:16 ` [PATCH 24/31] ARM: dts: rockchip: Add 8-channel I2S for RK3128 Alex Bee
2023-08-29 17:16 ` [PATCH 25/31] ARM: dts: rockchip: Add spdif " Alex Bee
2023-08-29 17:16 ` [PATCH 26/31] ARM: dts: rockchip: Add gmac " Alex Bee
2023-08-29 17:16 ` [PATCH 27/31] ARM: dts: rockchip: Add dwc2 otg fifo siztes for RK312x Alex Bee
2023-08-29 17:16 ` [PATCH 28/31] ARM: dts: rockchip: Add USB host clocks " Alex Bee
2023-08-29 17:16 ` [PATCH 29/31] ARM: dts: rockchip: Make usbphy the parent of SCLK_USB480M " Alex Bee
2023-08-29 17:16 ` [PATCH 30/31] ARM: dts: rockchip: Add sdmmc_det pinctrl " Alex Bee
2023-08-29 17:16 ` [PATCH 31/31] ARM: dts: Add Geniatech XPI-3128 RK3128 board Alex Bee
2023-09-26 8:08 ` (subset) [PATCH 00/31] Fix and improve Rockchip RK3128 support Mark Brown
2023-11-27 13:22 ` Vinod Koul
2023-12-12 20:03 ` Heiko Stuebner
2023-12-13 20:29 ` Alex Bee
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