From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B0FCCC71153 for ; Tue, 29 Aug 2023 16:47:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237527AbjH2Qqv (ORCPT ); Tue, 29 Aug 2023 12:46:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41804 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237537AbjH2Qql (ORCPT ); Tue, 29 Aug 2023 12:46:41 -0400 Received: from frasgout.his.huawei.com (frasgout.his.huawei.com [185.176.79.56]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 209601A1; Tue, 29 Aug 2023 09:46:39 -0700 (PDT) Received: from lhrpeml500005.china.huawei.com (unknown [172.18.147.226]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4RZtWG5Wlyz67PFb; Wed, 30 Aug 2023 00:42:18 +0800 (CST) Received: from localhost (10.202.227.76) by lhrpeml500005.china.huawei.com (7.191.163.240) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.31; Tue, 29 Aug 2023 17:46:36 +0100 Date: Tue, 29 Aug 2023 17:46:35 +0100 From: Jonathan Cameron To: CC: Dan Williams , Navneet Singh , Fan Ni , Davidlohr Bueso , Dave Jiang , Alison Schofield , Vishal Verma , , Subject: Re: [PATCH RFC v2 15/18] cxl/mem: Trace Dynamic capacity Event Record Message-ID: <20230829174635.00004371@Huawei.com> In-Reply-To: <20230604-dcd-type2-upstream-v2-15-f740c47e7916@intel.com> References: <20230604-dcd-type2-upstream-v2-0-f740c47e7916@intel.com> <20230604-dcd-type2-upstream-v2-15-f740c47e7916@intel.com> Organization: Huawei Technologies Research and Development (UK) Ltd. X-Mailer: Claws Mail 4.1.0 (GTK 3.24.33; x86_64-w64-mingw32) MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.202.227.76] X-ClientProxiedBy: lhrpeml100003.china.huawei.com (7.191.160.210) To lhrpeml500005.china.huawei.com (7.191.163.240) X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 28 Aug 2023 22:21:06 -0700 ira.weiny@intel.com wrote: > From: Navneet Singh > > CXL rev 3.0 section 8.2.9.2.1.5 defines the Dynamic Capacity Event Record > Determine if the event read is a Dynamic capacity event record and > if so trace the record for the debug purpose. > > Add DC trace points to the trace log. Probably should say why these might be useful... > > Signed-off-by: Navneet Singh > Signed-off-by: Ira Weiny > > --- > [iweiny: fixups] > --- > drivers/cxl/core/mbox.c | 5 ++++ > drivers/cxl/core/trace.h | 65 ++++++++++++++++++++++++++++++++++++++++++++++++ > 2 files changed, 70 insertions(+) > > diff --git a/drivers/cxl/core/mbox.c b/drivers/cxl/core/mbox.c > index 9d9c13e13ecf..9462c34aa1dc 100644 > --- a/drivers/cxl/core/mbox.c > +++ b/drivers/cxl/core/mbox.c > @@ -939,6 +939,11 @@ static void cxl_event_trace_record(const struct cxl_memdev *cxlmd, > (struct cxl_event_mem_module *)record; > > trace_cxl_memory_module(cxlmd, type, rec); > + } else if (uuid_equal(id, &dc_event_uuid)) { > + struct dcd_event_dyn_cap *rec = > + (struct dcd_event_dyn_cap *)record; > + > + trace_cxl_dynamic_capacity(cxlmd, type, rec); > } else { > /* For unknown record types print just the header */ > trace_cxl_generic_event(cxlmd, type, record); > diff --git a/drivers/cxl/core/trace.h b/drivers/cxl/core/trace.h > index a0b5819bc70b..1899c5cc96b9 100644 > --- a/drivers/cxl/core/trace.h > +++ b/drivers/cxl/core/trace.h > @@ -703,6 +703,71 @@ TRACE_EVENT(cxl_poison, > ) > ); > > +/* > + * DYNAMIC CAPACITY Event Record - DER > + * > + * CXL rev 3.0 section 8.2.9.2.1.5 Table 8-47 > + */ > + > +#define CXL_DC_ADD_CAPACITY 0x00 > +#define CXL_DC_REL_CAPACITY 0x01 > +#define CXL_DC_FORCED_REL_CAPACITY 0x02 > +#define CXL_DC_REG_CONF_UPDATED 0x03 > +#define show_dc_evt_type(type) __print_symbolic(type, \ > + { CXL_DC_ADD_CAPACITY, "Add capacity"}, \ > + { CXL_DC_REL_CAPACITY, "Release capacity"}, \ > + { CXL_DC_FORCED_REL_CAPACITY, "Forced capacity release"}, \ > + { CXL_DC_REG_CONF_UPDATED, "Region Configuration Updated" } \ > +) > + > +TRACE_EVENT(cxl_dynamic_capacity, > + > + TP_PROTO(const struct cxl_memdev *cxlmd, enum cxl_event_log_type log, > + struct dcd_event_dyn_cap *rec), > + > + TP_ARGS(cxlmd, log, rec), > + > + TP_STRUCT__entry( > + CXL_EVT_TP_entry > + > + /* Dynamic capacity Event */ > + __field(u8, event_type) > + __field(u16, hostid) > + __field(u8, region_id) > + __field(u64, dpa_start) > + __field(u64, length) > + __array(u8, tag, CXL_DC_EXTENT_TAG_LEN) > + __field(u16, sh_extent_seq) > + ), > + > + TP_fast_assign( > + CXL_EVT_TP_fast_assign(cxlmd, log, rec->hdr); > + > + /* Dynamic_capacity Event */ > + __entry->event_type = rec->data.event_type; > + > + /* DCD event record data */ > + __entry->hostid = le16_to_cpu(rec->data.host_id); > + __entry->region_id = rec->data.region_index; > + __entry->dpa_start = le64_to_cpu(rec->data.extent.start_dpa); > + __entry->length = le64_to_cpu(rec->data.extent.length); > + memcpy(__entry->tag, &rec->data.extent.tag, CXL_DC_EXTENT_TAG_LEN); > + __entry->sh_extent_seq = le16_to_cpu(rec->data.extent.shared_extn_seq); > + ), > + > + CXL_EVT_TP_printk("event_type='%s' host_id='%d' region_id='%d' " \ > + "starting_dpa=%llx length=%llx tag=%s " \ > + "shared_extent_sequence=%d", > + show_dc_evt_type(__entry->event_type), > + __entry->hostid, > + __entry->region_id, > + __entry->dpa_start, > + __entry->length, > + __print_hex(__entry->tag, CXL_DC_EXTENT_TAG_LEN), > + __entry->sh_extent_seq > + ) > +); > + > #endif /* _CXL_EVENTS_H */ > > #define TRACE_INCLUDE_FILE trace >