From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C1B14C83F3E for ; Tue, 5 Sep 2023 17:02:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239494AbjIERBp (ORCPT ); Tue, 5 Sep 2023 13:01:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38670 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1354896AbjIEPfg (ORCPT ); Tue, 5 Sep 2023 11:35:36 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0A6BB133; Tue, 5 Sep 2023 08:35:32 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 6A72660A1D; Tue, 5 Sep 2023 15:35:31 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 81D84C433C7; Tue, 5 Sep 2023 15:35:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1693928130; bh=xOSL6yYjiLcHcyG/8cCVGMIG/NpsWnq3fQuWh4NECP4=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=BRLubsjzzO3t7dANy45kF0GwDU0fizq/mRFrtJYJX+vh2UkxKzPmUpG3Xcg2oGbLn b7pK4K3YO6Jgrn7Ei+VLwlp4wmBaP2PPF/pXOnK/XSf5hnA4jvWo/IXFerSpXkysA/ O+Pfgtxe3PVy79GaLtZ5PxWUOArAEKZqoWyxro+11S81thKzaSVaFvc4jOVv2TYqhe 5shVS6Rk1/daJZ0ygMbsDFuGjGvhjeasp8jxt+XoTaxfblZCP2b0gS7HjHVFrecIfN LDM0i0pBxa8BrPrbD8nbpeQA6KdEF8CDtuPsZh7bcqeCMOpp+vhn7sgbh7Yb8pUqYB LiYztYNUw1+/w== Received: (nullmailer pid 3432654 invoked by uid 1000); Tue, 05 Sep 2023 15:35:28 -0000 Date: Tue, 5 Sep 2023 10:35:28 -0500 From: Rob Herring To: Suzuki K Poulose Cc: Linu Cherian , mike.leach@linaro.org, james.clark@arm.com, leo.yan@linaro.org, linux-arm-kernel@lists.infradead.org, coresight@lists.linaro.org, linux-kernel@vger.kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, devicetree@vger.kernel.org, sgoutham@marvell.com, gcherian@marvell.com Subject: Re: [RFC PATCH v3 1/7] dt-bindings: arm: coresight-tmc: Add "memory-region" property Message-ID: <20230905153528.GA3428758-robh@kernel.org> References: <20230904050548.28047-1-lcherian@marvell.com> <20230904050548.28047-2-lcherian@marvell.com> <59bf237d-1645-8c44-94f2-72a0cf229595@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <59bf237d-1645-8c44-94f2-72a0cf229595@arm.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Sep 04, 2023 at 09:26:49AM +0100, Suzuki K Poulose wrote: > On 04/09/2023 06:05, Linu Cherian wrote: > > memory-region 0: Reserved trace buffer memory > > > > TMC ETR: When available, use this reserved memory region for > > trace data capture. Same region is used for trace data > > retention after a panic or watchdog reset. > > > > TMC ETF: When available, use this reserved memory region for > > trace data retention synced from internal SRAM after a panic or > > watchdog reset. > > > > memory-region 1: Reserved meta data memory > > > > TMC ETR, ETF: When available, use this memory for register > > snapshot retention synced from hardware registers after a panic > > or watchdog reset. > > Instead of having to use a number to map the memory regions, could > we use > > memory-region-names property to describe the index ? That way it > is much easier to read and is less error prone. You can, but the order should still be defined. > Names could be something like: > > tmc-reserved-trace > tmc-reserved-metadata Names are local to the binding. So 'tmc' is redundant. And everything is a reserved region for 'memory-region', so that's redundant too. Rob