From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 413F4EEB58C for ; Mon, 11 Sep 2023 20:48:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232860AbjIKUsh (ORCPT ); Mon, 11 Sep 2023 16:48:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39314 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242570AbjIKPuh (ORCPT ); Mon, 11 Sep 2023 11:50:37 -0400 Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CC201121 for ; Mon, 11 Sep 2023 08:50:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1694447432; x=1725983432; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=SbqsWDlQ88UeUXSb4ri6B+/0fcRCrTe6tE6CbAvmHbc=; b=Ej+e6cZM6pUWQewQ3QV0rS9d/d2uX5qjiTOUC26xhcXZ97S7uIZsoN4y l1QEaTBefHMIPO1+cg/VaAC63DihdvVnED8tr6KnoWiFkrjsLHcy19U21 yLsfCE0BFuhT4zXq74HSNUu0J/brONox92vSHOqIgT/BFuVNLyE5CndCY ksBR5ccQ9S7q7w+nPeYw23nH1OzOXzlH7Ul95pg01JXSJBbd+7kf3viuq yT5T1HJ8auTmcK9eIRc3+eUVf/gIhR49vL6FSQSJv3+v6SoYA9iE/4cBv iKmYq3MgwtxAYlXpX8SjHlOrCFP0mNnuFEhpN3rHvGbzifKkrCE98cBNY Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10830"; a="444541633" X-IronPort-AV: E=Sophos;i="6.02,244,1688454000"; d="scan'208";a="444541633" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Sep 2023 08:48:13 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10830"; a="917062284" X-IronPort-AV: E=Sophos;i="6.02,244,1688454000"; d="scan'208";a="917062284" Received: from kanliang-dev.jf.intel.com ([10.165.154.102]) by orsmga005.jf.intel.com with ESMTP; 11 Sep 2023 08:48:13 -0700 From: kan.liang@linux.intel.com To: peterz@infradead.org, mingo@redhat.com, acme@kernel.org, linux-kernel@vger.kernel.org Cc: mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org, namhyung@kernel.org, irogers@google.com, adrian.hunter@intel.com, ak@linux.intel.com, eranian@google.com, alexey.v.bayduraev@linux.intel.com, tinghao.zhang@intel.com, Kan Liang Subject: [RESEND PATCH V3 5/6] tools headers UAPI: Sync include/uapi/linux/perf_event.h header with the kernel Date: Mon, 11 Sep 2023 08:48:21 -0700 Message-Id: <20230911154822.2559213-5-kan.liang@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230911154822.2559213-1-kan.liang@linux.intel.com> References: <20230911154822.2559213-1-kan.liang@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Kan Liang Sync the new sample types and extra space for the branch event feature. Signed-off-by: Kan Liang --- Changes since V2: - Drop the new bit in struct perf_branch_entry - Introduce a new sample type PERF_SAMPLE_BRANCH_EXTRA tools/include/uapi/linux/perf_event.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/tools/include/uapi/linux/perf_event.h b/tools/include/uapi/linux/perf_event.h index 39c6a250dd1b..252066579dae 100644 --- a/tools/include/uapi/linux/perf_event.h +++ b/tools/include/uapi/linux/perf_event.h @@ -204,6 +204,10 @@ enum perf_branch_sample_type_shift { PERF_SAMPLE_BRANCH_PRIV_SAVE_SHIFT = 18, /* save privilege mode */ + PERF_SAMPLE_BRANCH_EXTRA_SHIFT = 19, /* support extra space */ + + PERF_SAMPLE_BRANCH_EVT_CNTRS_SHIFT = 20, /* save occurrences of events on a branch */ + PERF_SAMPLE_BRANCH_MAX_SHIFT /* non-ABI */ }; @@ -235,6 +239,10 @@ enum perf_branch_sample_type { PERF_SAMPLE_BRANCH_PRIV_SAVE = 1U << PERF_SAMPLE_BRANCH_PRIV_SAVE_SHIFT, + PERF_SAMPLE_BRANCH_EXTRA = 1U << PERF_SAMPLE_BRANCH_EXTRA_SHIFT, + + PERF_SAMPLE_BRANCH_EVT_CNTRS = 1U << PERF_SAMPLE_BRANCH_EVT_CNTRS_SHIFT, + PERF_SAMPLE_BRANCH_MAX = 1U << PERF_SAMPLE_BRANCH_MAX_SHIFT, }; @@ -982,6 +990,7 @@ enum perf_event_type { * { u64 nr; * { u64 hw_idx; } && PERF_SAMPLE_BRANCH_HW_INDEX * { u64 from, to, flags } lbr[nr]; + * { u64 extra; } ext[nr] && PERF_SAMPLE_BRANCH_EXTRA * } && PERF_SAMPLE_BRANCH_STACK * * { u64 abi; # enum perf_sample_regs_abi -- 2.35.1