From: Peter Zijlstra <peterz@infradead.org>
To: K Prateek Nayak <kprateek.nayak@amd.com>
Cc: Arjan van de Ven <arjan@linux.intel.com>,
Thomas Gleixner <tglx@linutronix.de>,
LKML <linux-kernel@vger.kernel.org>,
x86@kernel.org, Tom Lendacky <thomas.lendacky@amd.com>,
Andrew Cooper <andrew.cooper3@citrix.com>,
Huang Rui <ray.huang@amd.com>, Juergen Gross <jgross@suse.com>,
Dimitri Sivanich <dimitri.sivanich@hpe.com>,
Michael Kelley <mikelley@microsoft.com>,
Wei Liu <wei.liu@kernel.org>, Pu Wen <puwen@hygon.cn>,
Qiuxu Zhuo <qiuxu.zhuo@intel.com>,
Sohil Mehta <sohil.mehta@intel.com>,
Gautham Shenoy <gautham.shenoy@amd.com>
Subject: Re: [patch V4 24/41] x86/cpu: Provide cpu_init/parse_topology()
Date: Fri, 15 Sep 2023 13:54:28 +0200 [thread overview]
Message-ID: <20230915115428.GD6721@noisy.programming.kicks-ass.net> (raw)
In-Reply-To: <6f101718-7ee1-1c3d-3e0a-3aa708928ecd@amd.com>
On Tue, Aug 29, 2023 at 08:46:14AM +0530, K Prateek Nayak wrote:
> Hello Arjan,
>
> On 8/28/2023 8:04 PM, Arjan van de Ven wrote:
> > On 8/28/2023 7:28 AM, K Prateek Nayak wrote:
> >>> - Are these really different between AMD and Intel or is this some
> >>> naming convention issue which needs to be resolved?
> >> They do have different characteristics since, on Sapphire
> >> Rapids, the LLC is at a socket boundary despite having multiple
> >> tiles. (Please correct me if I'm wrong, I'm going off of
> >> llc_id shared in this report by Qiuxu Zhuo -
> >> https://lore.kernel.org/all/20230809161219.83084-1-qiuxu.zhuo@intel.com/)
> >>
> >
> > Sapphire reports itself as 1 tile though (since logically it is) as far as I know
> >
>
> I believe there are some variants with multiple tiles, at least the
> following press-release suggests that:
>
> https://www.intc.com/news-events/press-releases/detail/1598/intel-launches-4th-gen-xeon-scalable-processors-max-series
>
> specifically "... combining up to four Intel 7-built tiles on a single
> package, connected using Intel EMIB ...". Perhaps the one from Qiuxu
> Zhuo's report does not contain multiple tiles.
I think what Arjan was saying that despite them being build using
multipe physical tiles, they describe themselves, in the topology leave,
as being a single tile.
next prev parent reply other threads:[~2023-09-15 11:55 UTC|newest]
Thread overview: 85+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-14 8:53 [patch V4 00/41] x86/cpu: Rework the topology evaluation Thomas Gleixner
2023-08-14 8:53 ` [patch V4 01/41] x86/cpu/hygon: Fix the CPU topology evaluation for real Thomas Gleixner
2023-08-14 8:53 ` [patch V4 02/41] cpu/SMT: Make SMT control more robust against enumeration failures Thomas Gleixner
2023-08-15 21:15 ` Dave Hansen
2023-10-10 12:18 ` Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 03/41] x86/apic: Fake primary thread mask for XEN/PV Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 04/41] x86/cpu: Encapsulate topology information in cpuinfo_x86 Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 05/41] x86/cpu: Move phys_proc_id into topology info Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 06/41] x86/cpu: Move cpu_die_id " Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 07/41] scsi: lpfc: Use topology_core_id() Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 08/41] hwmon: (fam15h_power) " Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 09/41] x86/cpu: Move cpu_core_id into topology info Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 10/41] x86/cpu: Move cu_id " Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 11/41] x86/cpu: Remove pointless evaluation of x86_coreid_bits Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 12/41] x86/cpu: Move logical package and die IDs into topology info Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 13/41] x86/cpu: Move cpu_l[l2]c_id " Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 14/41] x86/apic: Use BAD_APICID consistently Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 15/41] x86/apic: Use u32 for APIC IDs in global data Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:53 ` [patch V4 16/41] x86/apic: Use u32 for check_apicid_used() Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:54 ` [patch V4 17/41] x86/apic: Use u32 for cpu_present_to_apicid() Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:54 ` [patch V4 18/41] x86/apic: Use u32 for phys_pkg_id() Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:54 ` [patch V4 19/41] x86/apic: Use u32 for [gs]et_apic_id() Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:54 ` [patch V4 20/41] x86/apic: Use u32 for wakeup_secondary_cpu[_64]() Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-10-13 10:32 ` [tip: x86/core] x86/apic, x86/hyperv: Use u32 in hv_snp_boot_ap() too tip-bot2 for Ingo Molnar
2023-08-14 8:54 ` [patch V4 21/41] x86/cpu/topology: Cure the abuse of cpuinfo for persisting logical ids Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:54 ` [patch V4 22/41] x86/cpu: Provide debug interface Thomas Gleixner
2023-10-13 9:38 ` [tip: x86/core] " tip-bot2 for Thomas Gleixner
2023-08-14 8:54 ` [patch V4 23/41] x86/cpu: Provide cpuid_read() et al Thomas Gleixner
2023-08-14 8:54 ` [patch V4 24/41] x86/cpu: Provide cpu_init/parse_topology() Thomas Gleixner
2023-08-28 6:07 ` K Prateek Nayak
2023-08-28 10:05 ` Thomas Gleixner
2023-08-28 14:03 ` Arjan van de Ven
2023-08-28 14:28 ` K Prateek Nayak
2023-08-28 14:34 ` Arjan van de Ven
2023-08-29 3:16 ` K Prateek Nayak
2023-09-15 11:54 ` Peter Zijlstra [this message]
2023-09-15 14:04 ` Arjan van de Ven
2023-09-19 3:54 ` K Prateek Nayak
2023-09-19 8:13 ` Thomas Gleixner
2023-09-20 3:23 ` K Prateek Nayak
2023-09-19 13:44 ` Arjan van de Ven
2023-09-20 3:21 ` K Prateek Nayak
2023-09-14 9:20 ` K Prateek Nayak
2023-09-15 11:46 ` Thomas Gleixner
2023-08-14 8:54 ` [patch V4 25/41] x86/cpu: Add legacy topology parser Thomas Gleixner
2023-08-14 8:54 ` [patch V4 26/41] x86/cpu: Use common topology code for Centaur and Zhaoxin Thomas Gleixner
2023-08-14 8:54 ` [patch V4 27/41] x86/cpu: Move __max_die_per_package to common.c Thomas Gleixner
2023-08-14 8:54 ` [patch V4 28/41] x86/cpu: Provide a sane leaf 0xb/0x1f parser Thomas Gleixner
2023-08-16 12:09 ` Zhang, Rui
2023-08-17 9:11 ` Thomas Gleixner
2023-08-14 8:54 ` [patch V4 29/41] x86/cpu: Use common topology code for Intel Thomas Gleixner
2023-08-14 8:54 ` [patch V4 30/41] x86/cpu/amd: Provide a separate accessor for Node ID Thomas Gleixner
2023-08-14 8:54 ` [patch V4 31/41] x86/cpu: Provide an AMD/HYGON specific topology parser Thomas Gleixner
2023-08-14 8:54 ` [patch V4 32/41] x86/smpboot: Teach it about topo.amd_node_id Thomas Gleixner
2023-08-14 8:54 ` [patch V4 33/41] x86/cpu: Use common topology code for AMD Thomas Gleixner
2023-08-14 8:54 ` [patch V4 34/41] x86/cpu: Use common topology code for HYGON Thomas Gleixner
2023-08-14 8:54 ` [patch V4 35/41] x86/mm/numa: Use core domain size on AMD Thomas Gleixner
2023-08-14 8:54 ` [patch V4 36/41] x86/cpu: Make topology_amd_node_id() use the actual node info Thomas Gleixner
2023-08-14 8:54 ` [patch V4 37/41] x86/cpu: Remove topology.c Thomas Gleixner
2023-08-14 8:54 ` [patch V4 38/41] x86/cpu: Remove x86_coreid_bits Thomas Gleixner
2023-08-14 8:54 ` [patch V4 39/41] x86/apic: Remove unused phys_pkg_id() callback Thomas Gleixner
2023-08-14 8:54 ` [patch V4 40/41] x86/xen/smp_pv: Remove cpudata fiddling Thomas Gleixner
2023-08-14 8:54 ` [patch V4 41/41] x86/apic/uv: Remove the private leaf 0xb parser Thomas Gleixner
2023-08-14 14:36 ` [patch V4 00/41] x86/cpu: Rework the topology evaluation Peter Zijlstra
2023-08-16 11:36 ` Zhang, Rui
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