From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4FB5DE7D0A2 for ; Thu, 21 Sep 2023 19:52:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229861AbjIUTwI (ORCPT ); Thu, 21 Sep 2023 15:52:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35380 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230451AbjIUTvt (ORCPT ); Thu, 21 Sep 2023 15:51:49 -0400 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6C0496DE12 for ; Thu, 21 Sep 2023 12:42:30 -0700 (PDT) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 86BC6C433C8; Thu, 21 Sep 2023 19:42:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1695325350; bh=KXNNit1NR0Sy8mgpeMe5utffy8Ysa2Z5Lh2pnEXXbtY=; h=From:To:Cc:Subject:Date:From; b=Yj43bkTiD1Tf/7RhNKf5XH2vsSxWTiZ0qB5gqZHiMiih9zRHiHUvlCVdbdGXNkGeH gOOBf3RDuHt6OssPBu4ivRVvQFsocBE9W4b+ELoGb1uKiDRvpzn1EJxGPLCywmNMmG nVckkYw4qU47jbiOIU9O9l5JbY1uDydM04VsTDRcq44TrMis4S7/Vgu0K1btCWd95O AcuBL6+i0IOG7McOEAZmECpK/sZtWeTxhyhXjTDsBrMu0DZ3oVVIEqmVPtoqS7TbEP 1hUFDXvdtDHX5jQ6t3wl4Ve81BQnSzprKy5DsSB8TqNFet1nUZjRoPNEFtVejWb1Qq kkqTrBGaLX0tA== Received: (nullmailer pid 1050671 invoked by uid 1000); Thu, 21 Sep 2023 19:42:28 -0000 From: Rob Herring To: Catalin Marinas , Will Deacon Cc: Marc Zyngier , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/2] arm64: Add Cortex-A520 CPU part definition Date: Thu, 21 Sep 2023 14:41:51 -0500 Message-Id: <20230921194156.1050055-1-robh@kernel.org> X-Mailer: git-send-email 2.40.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the CPU Part number for the new Arm design. Cc: stable@vger.kernel.org Signed-off-by: Rob Herring --- arch/arm64/include/asm/cputype.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h index 5f6f84837a49..74d00feb62f0 100644 --- a/arch/arm64/include/asm/cputype.h +++ b/arch/arm64/include/asm/cputype.h @@ -79,6 +79,7 @@ #define ARM_CPU_PART_CORTEX_A78AE 0xD42 #define ARM_CPU_PART_CORTEX_X1 0xD44 #define ARM_CPU_PART_CORTEX_A510 0xD46 +#define ARM_CPU_PART_CORTEX_A520 0xD80 #define ARM_CPU_PART_CORTEX_A710 0xD47 #define ARM_CPU_PART_CORTEX_A715 0xD4D #define ARM_CPU_PART_CORTEX_X2 0xD48 @@ -148,6 +149,7 @@ #define MIDR_CORTEX_A78AE MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78AE) #define MIDR_CORTEX_X1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X1) #define MIDR_CORTEX_A510 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A510) +#define MIDR_CORTEX_A520 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A520) #define MIDR_CORTEX_A710 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A710) #define MIDR_CORTEX_A715 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A715) #define MIDR_CORTEX_X2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X2) -- 2.40.1