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From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Martin Kurbanov <mmkurbanov@salutedevices.com>
Cc: Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Mario Kicherer <dev@kicherer.org>,
	Chuanhong Guo <gch981213@gmail.com>, Dhruva Gole <d-gole@ti.com>,
	<linux-kernel@vger.kernel.org>, <linux-mtd@lists.infradead.org>,
	<kernel@sberdevices.ru>
Subject: Re: [PATCH v1] mtd: spinand: add support for FORESEE F35SQA002G
Date: Mon, 2 Oct 2023 14:09:53 +0200	[thread overview]
Message-ID: <20231002140953.170c0055@xps-13> (raw)
In-Reply-To: <54227489-519b-3268-885f-cf7a9687822b@salutedevices.com>

Hi Martin,

mmkurbanov@salutedevices.com wrote on Mon, 2 Oct 2023 13:18:18 +0300:

> Hi Miquel,
> Thanks for your review.
> 
> On 02.10.2023 12:44, Miquel Raynal wrote:
> > Hi Martin,  
> >> +static int f35sqa002g_ooblayout_free(struct mtd_info *mtd, int section,
> >> +				     struct mtd_oob_region *region)
> >> +{
> >> +	/* XXX: It is not possible to partially write to this OOB area, as both
> >> +	 * the main and OOB areas are protected by ECC. The user needs to
> >> +	 * program both the main area and OOB area at one programming time,
> >> +	 * so that the ECC parity code can be calculated properly.
> >> +	 */  
> > 
> > Is this comment really needed? I believe it could be dropped, unless
> > you are really experiencing strange subpage write attempts?  
> 
> If you write separately to the main area and the OOB area. This is the
> case with many SPI NAND chips, I agree that this comment can be dropped.
> 

All NAND chips have this limitation actually. I guess you can just get
rid of the comment. The rest looks ok.

Thanks, Miquèl

      reply	other threads:[~2023-10-02 12:17 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-29 14:49 [PATCH v1] mtd: spinand: add support for FORESEE F35SQA002G Martin Kurbanov
2023-10-02  9:44 ` Miquel Raynal
2023-10-02 10:18   ` Martin Kurbanov
2023-10-02 12:09     ` Miquel Raynal [this message]

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