[PATCH v11 10/20] cxl/pci: Introduce config option PCIEAER_CXL

Robert Richter
2023-09-27T15:47:24Z

CXL error handling depends on AER.

Introduce config option PCIEAER_CXL in preparation of the AER dport
error handling. Also, introduce the stub function
devm_cxl_setup_parent_dport() to setup dports.

This is in preparation of follow on patches.

Note the Kconfg part of the option is added in a later patch to enable
it once coding of the feature is complete.

Signed-off-by: Robert Richter <rrichter@amd.com>
---
drivers/cxl/core/pci.c | 9 +++++++++
drivers/cxl/cxl.h | 7 +++++++
drivers/cxl/mem.c | 2 ++
3 files changed, 18 insertions(+)

diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c
index c7a7887ebdcf..6ba3b7370816 100644
--- a/drivers/cxl/core/pci.c
+++ b/drivers/cxl/core/pci.c
@@ -718,6 +718,15 @@ static bool cxl_report_and_clear(struct cxl_dev_state *cxlds)
return true;
}

+#ifdef CONFIG_PCIEAER_CXL
+
+void devm_cxl_setup_parent_dport(struct device *host, struct cxl_dport *dport)
+{
+}
+EXPORT_SYMBOL_NS_GPL(devm_cxl_setup_parent_dport, CXL);
+
+#endif
+
pci_ers_result_t cxl_error_detected(struct pci_dev *pdev,
pci_channel_state_t state)
{
diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
index c07064e0c136..cfa2f6bede41 100644
--- a/drivers/cxl/cxl.h
+++ b/drivers/cxl/cxl.h
@@ -704,6 +704,13 @@ struct cxl_dport *devm_cxl_add_rch_dport(struct cxl_port *port,
struct device *dport_dev, int port_id,
resource_size_t rcrb);

+#ifdef CONFIG_PCIEAER_CXL
+void devm_cxl_setup_parent_dport(struct device *host, struct cxl_dport *dport);
+#else
+static inline void devm_cxl_setup_parent_dport(struct device *host,
+ struct cxl_dport *dport) { }
+#endif
+
struct cxl_decoder *to_cxl_decoder(struct device *dev);
struct cxl_root_decoder *to_cxl_root_decoder(struct device *dev);
struct cxl_switch_decoder *to_cxl_switch_decoder(struct device *dev);
diff --git a/drivers/cxl/mem.c b/drivers/cxl/mem.c
index 04107058739b..61ca21c020fa 100644
--- a/drivers/cxl/mem.c
+++ b/drivers/cxl/mem.c
@@ -157,6 +157,8 @@ static int cxl_mem_probe(struct device *dev)
else
endpoint_parent = &parent_port->dev;

+ devm_cxl_setup_parent_dport(dev, dport);
+
device_lock(endpoint_parent);
if (!endpoint_parent->driver) {
dev_err(dev, "CXL port topology %s not enabled\n",
--
2.30.2