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From: Dave Hansen <dave.hansen@linux.intel.com>
To: linux-kernel@vger.kernel.org, nathan@kernel.org
Cc: x86@kernel.org, acdunlap@google.com, ashok.raj@intel.com,
	bp@alien8.de, dave.hansen@linux.intel.com, david@redhat.com,
	dionnaglaze@google.com, hpa@zytor.com, jacobhxu@google.com,
	jgross@suse.com, jroedel@suse.de, khalid.elmously@canonical.com,
	kim.phillips@amd.com, kirill.shutemov@linux.intel.com,
	llvm@lists.linux.dev, luto@kernel.org, mingo@redhat.com,
	nikunj@amd.com, peterz@infradead.org, pgonda@google.com,
	rientjes@google.com, rppt@kernel.org, seanjc@google.com,
	tglx@linutronix.de, thomas.lendacky@amd.com,
	Ingo Molnar <mingo@kernel.org>
Subject: [PATCH] x86/boot: Move x86_cache_alignment initialization to correct spot
Date: Mon,  2 Oct 2023 15:00:45 -0700	[thread overview]
Message-ID: <20231002220045.1014760-1-dave.hansen@linux.intel.com> (raw)
In-Reply-To: <20231002200426.GA4127272@dev-arch.thelio-3990X>

c->x86_cache_alignment is initialized from c->x86_clflush_size.
However, commit fbf6449f84bf moved c->x86_clflush_size initialization
to later in boot without moving the c->x86_cache_alignment assignment.

This presumably left c->x86_cache_alignment set to zero for longer
than it should be.

The result was an oops on 32-bit kernels while accessing a pointer
at 0x20.  The 0x20 came from accessing a structure member at offset
0x10 (buffer->cpumask) from a ZERO_SIZE_PTR=0x10.  kmalloc() can
evidently return ZERO_SIZE_PTR when it's given 0 as its alignment
requirement.

Move the c->x86_cache_alignment initialization to be after
c->x86_clflush_size has an actual value.

Fixes: fbf6449f84bf ("x86/sev-es: Set x86_virt_bits to the correct value straight away, instead of a two-phase approach")
Cc: Adam Dunlap <acdunlap@google.com>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: Jacob Xu <jacobhxu@google.com>
Link: https://lore.kernel.org/all/20231002200426.GA4127272@dev-arch.thelio-3990X/
---
 arch/x86/kernel/cpu/common.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 8d7063e4f63c9..9c51ad5bbf319 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1141,6 +1141,7 @@ void get_cpu_address_sizes(struct cpuinfo_x86 *c)
 		}
 	}
 	c->x86_cache_bits = c->x86_phys_bits;
+	c->x86_cache_alignment = c->x86_clflush_size;
 }
 
 static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c)
@@ -1594,8 +1595,6 @@ static void __init cpu_parse_early_param(void)
  */
 static void __init early_identify_cpu(struct cpuinfo_x86 *c)
 {
-	c->x86_cache_alignment = c->x86_clflush_size;
-
 	memset(&c->x86_capability, 0, sizeof(c->x86_capability));
 	c->extended_cpuid_level = 0;
 
-- 
2.34.1


  parent reply	other threads:[~2023-10-02 22:02 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-12  0:27 [PATCH v2 0/2] x86/sev-es: Resolve early #VC handler UB Adam Dunlap
2023-09-12  0:27 ` [PATCH v2 1/2] x86/sev-es: Allow copy_from_kernel_nofault in earlier boot Adam Dunlap
2023-09-20 20:37   ` Sean Christopherson
2023-09-20 22:54     ` Dave Hansen
2023-09-28 21:11   ` [tip: x86/mm] x86/sev-es: Allow copy_from_kernel_nofault() " tip-bot2 for Adam Dunlap
2023-09-12  0:27 ` [PATCH v2 2/2] x86/sev-es: Only set x86_virt_bits to correct value Adam Dunlap
2023-09-28 21:11   ` [tip: x86/mm] x86/sev-es: Set x86_virt_bits to the correct value straight away, instead of a two-phase approach tip-bot2 for Adam Dunlap
2023-10-02 20:04   ` [PATCH v2 2/2] x86/sev-es: Only set x86_virt_bits to correct value Nathan Chancellor
2023-10-02 21:41     ` Dave Hansen
2023-10-02 21:46       ` Adam Dunlap
2023-10-02 22:00     ` Dave Hansen [this message]
2023-10-02 22:24       ` [PATCH] x86/boot: Move x86_cache_alignment initialization to correct spot Nathan Chancellor
2023-10-03  7:28         ` Ingo Molnar
2023-10-03  7:38       ` [tip: x86/mm] " tip-bot2 for Dave Hansen
2023-09-28 20:51 ` [PATCH v2 0/2] x86/sev-es: Resolve early #VC handler UB Ingo Molnar

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