Re: [PATCH v11 1/1] vfio/nvgpu: Add vfio pci variant module for grace hopper

Bagas Sanjaya
2023-10-11T05:46:14Z

On 10/10/2023 02:36, Alex Williamson wrote:
> On Sun, 8 Oct 2023 07:06:41 +0700
> Bagas Sanjaya <bagasdotme@gmail.com> wrote:
>
>> On Sun, Oct 08, 2023 at 01:52:54AM +0530, ankita@nvidia.com wrote:
>>> PCI BAR are aligned to the power-of-2, but the actual memory on the
>>> device may not. A read or write access to the physical address from the
>>> last device PFN up to the next power-of-2 aligned physical address
>>> results in reading ~0 and dropped writes.
>>>
>>
>> Reading garbage or padding in that case?
>>
>> Confused...
>
> The coherent memory size is rounded to a power-of-2 to be compliant with
> PCI BAR semantics, but reading beyond the implemented size fills the
> return buffer with -1 data, as is common on many platforms when reading
> from an unimplemented section of the address space. Thanks,
>
> Alex
>

Thanks for the explanation!

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