From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0CAB8CD6E76 for ; Wed, 11 Oct 2023 14:20:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234987AbjJKOUY (ORCPT ); Wed, 11 Oct 2023 10:20:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49132 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232420AbjJKOUX (ORCPT ); Wed, 11 Oct 2023 10:20:23 -0400 Received: from casper.infradead.org (casper.infradead.org [IPv6:2001:8b0:10b:1236::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 90E60A4; Wed, 11 Oct 2023 07:20:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=In-Reply-To:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=giWFgglIwvl79cFsu43H0+4WKJFrU3jVnmUoXzCqgBA=; b=BhimHCpistBqcNILTpqmB95VgU 7PmFSmnPRvQQyRpFA0g7FVo0LbKL5mLZwxk/6dbjL+y/CSOGsKpPgP9QBf1R85Lcb7iXfpVCC3p9j uQUMiBKlRc+vbq1Fktephy4/45HG9+hQRSjxyNzaWWPv4mBrSIXcl8AqE+imo/sUd6Oia6/wG7jNQ NuVuioo4VIDTezY7pjFo+uV6eqmRDBsi8kf3JlR9roMTFRFib4KOxUv6a04qCfR0BuytGa6g7yzn3 0uyvgrPPgjUp3HzKHrRJ4vn9efOIJnnevO4/9BMPcATcav/BS8x5jOrtQNUy6fy3BTyjBA0+5iOwe oBwI4MVg==; Received: from j130084.upc-j.chello.nl ([24.132.130.84] helo=noisy.programming.kicks-ass.net) by casper.infradead.org with esmtpsa (Exim 4.94.2 #2 (Red Hat Linux)) id 1qqa4C-00BCzx-9t; Wed, 11 Oct 2023 14:20:04 +0000 Received: by noisy.programming.kicks-ass.net (Postfix, from userid 1000) id EE6F130036C; Wed, 11 Oct 2023 16:20:03 +0200 (CEST) Date: Wed, 11 Oct 2023 16:20:03 +0200 From: Peter Zijlstra To: Sean Christopherson Cc: Mingwei Zhang , Ingo Molnar , Dapeng Mi , Paolo Bonzini , Arnaldo Carvalho de Melo , Kan Liang , Like Xu , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Ian Rogers , Adrian Hunter , kvm@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Zhenyu Wang , Zhang Xiong , Lv Zhiyuan , Yang Weijiang , Dapeng Mi , Jim Mattson , David Dunn , Thomas Gleixner Subject: Re: [Patch v4 07/13] perf/x86: Add constraint for guest perf metrics event Message-ID: <20231011142003.GF19999@noisy.programming.kicks-ass.net> References: <20231002115718.GB13957@noisy.programming.kicks-ass.net> <20231002204017.GB27267@noisy.programming.kicks-ass.net> <20231003081616.GE27267@noisy.programming.kicks-ass.net> <20231004112152.GA5947@noisy.programming.kicks-ass.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Oct 04, 2023 at 02:50:46PM -0700, Sean Christopherson wrote: > Thinking about this more, what if we do a blend of KVM's FPU swapping and debug > register swapping? > > A. Load guest PMU state in vcpu_enter_guest() after IRQs are disabled > B. Put guest PMU state (and load host state) in vcpu_enter_guest() before IRQs > are enabled, *if and only if* the current CPU has one or perf events that > wants to use the hardware PMU > C. Put guest PMU state at vcpu_put() > D. Add a perf callback that is invoked from IRQ context when perf wants to > configure a new PMU-based events, *before* actually programming the MSRs, > and have KVM's callback put the guest PMU state > No real objection, but I would suggest arriving at that solution by first building the simple-stupid thing and then making it more complicated in additinoal patches. Hmm?