From: Conor Dooley <conor@kernel.org>
To: Kris Chaplin <kris.chaplin@amd.com>
Cc: thomas.delev@amd.com, michal.simek@amd.com,
krzysztof.kozlowski@linaro.org, robh+dt@kernel.org,
conor+dt@kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, git@amd.com
Subject: Re: [PATCH 1/2] dt-bindings: w1: Add YAML DT Schema for AMD w1 master and MAINTAINERS entry
Date: Fri, 13 Oct 2023 16:01:32 +0100 [thread overview]
Message-ID: <20231013-blip-sheath-440f05d3767e@spud> (raw)
In-Reply-To: <20231013093109.37165-2-kris.chaplin@amd.com>
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On Fri, Oct 13, 2023 at 02:30:12AM -0700, Kris Chaplin wrote:
> Add YAML DT Schema for the AMD w1 master IP.
>
> This hardware guarantees protocol timing for driving off-board devices such
> as thermal sensors, proms, etc using the 1wire protocol.
>
> Add MAINTAINERS entry for DT Schema.
>
> Co-developed-by: Thomas Delev <thomas.delev@amd.com>
> Signed-off-by: Thomas Delev <thomas.delev@amd.com>
> Signed-off-by: Kris Chaplin <kris.chaplin@amd.com>
> ---
> .../bindings/w1/amd,axi-1wire-master.yaml | 44 +++++++++++++++++++
> MAINTAINERS | 7 +++
> 2 files changed, 51 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/w1/amd,axi-1wire-master.yaml
>
> diff --git a/Documentation/devicetree/bindings/w1/amd,axi-1wire-master.yaml b/Documentation/devicetree/bindings/w1/amd,axi-1wire-master.yaml
> new file mode 100644
> index 000000000000..41f7294a84a3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/w1/amd,axi-1wire-master.yaml
> @@ -0,0 +1,44 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/w1/amd,axi-1wire-master.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: AMD AXI 1-wire bus master for Programmable Logic
Inconsistent case for the title here bothers my OCD, but the binding is
fine as far as I can see.
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Thanks,
Conor.
> +
> +maintainers:
> + - Kris Chaplin <kris.chaplin@amd.com>
> +
> +properties:
> + compatible:
> + const: amd,axi-1wire-master
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - interrupts
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> + onewire@a0000000 {
> + compatible = "amd,axi-1wire-master";
> + reg = <0xa0000000 0x10000>;
> + clocks = <&zynqmp_clk 0x47>;
> + interrupts = <GIC_SPI 0x59 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> +...
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 4b2c378b4fd9..6ec3922b256e 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -1066,6 +1066,13 @@ M: Sanjay R Mehta <sanju.mehta@amd.com>
> S: Maintained
> F: drivers/spi/spi-amd.c
>
> +AMD W1 DRIVER
> +M: Kris Chaplin <kris.chaplin@amd.com>
> +R: Thomas Delev <thomas.delev@amd.com>
> +R: Michal Simek <michal.simek@amd.com>
> +S: Maintained
> +F: Documentation/devicetree/bindings/w1/amd,axi-1wire-master.yaml
> +
> AMD XGBE DRIVER
> M: "Shyam Sundar S K" <Shyam-sundar.S-k@amd.com>
> L: netdev@vger.kernel.org
> --
> 2.42.GIT
>
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next prev parent reply other threads:[~2023-10-13 15:01 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-13 9:30 [PATCH 0/2] w1: Add 1-wire master driver for AMD programmable logic IP Core Kris Chaplin
2023-10-13 9:30 ` [PATCH 1/2] dt-bindings: w1: Add YAML DT Schema for AMD w1 master and MAINTAINERS entry Kris Chaplin
2023-10-13 15:01 ` Conor Dooley [this message]
2023-10-13 15:04 ` Krzysztof Kozlowski
2023-10-13 15:07 ` Conor Dooley
2023-10-13 15:22 ` Krzysztof Kozlowski
2023-10-13 15:23 ` Kris Chaplin
2023-10-13 15:29 ` Krzysztof Kozlowski
2023-10-13 15:36 ` Kris Chaplin
2023-10-13 17:18 ` Rob Herring
2023-10-13 17:58 ` Kris Chaplin
2023-10-13 9:30 ` [PATCH 2/2] w1: Add 1-wire master driver for AMD programmable logic IP Core Kris Chaplin
2023-10-13 15:20 ` Krzysztof Kozlowski
2023-10-18 15:54 ` Kris Chaplin
2023-10-18 16:00 ` Krzysztof Kozlowski
2023-10-19 14:24 ` [PATCH v2 0/2] w1: Add AXI 1-wire host driver for AMD programmable logic IP core Kris Chaplin
2023-10-19 14:24 ` [PATCH v2 1/2] dt-bindings: w1: Add YAML DT schema for AMD AXI w1 host and MAINTAINERS entry Kris Chaplin
2023-10-19 14:30 ` Conor Dooley
2023-10-19 14:35 ` Michal Simek
2023-10-19 14:39 ` Kris Chaplin
2023-10-19 14:24 ` [PATCH v2 2/2] w1: Add AXI 1-wire host driver for AMD programmable logic IP core Kris Chaplin
2023-10-19 14:28 ` [PATCH v2 0/2] " Conor Dooley
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