From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: x86@kernel.org, Borislav Petkov <bp@alien8.de>
Subject: [patch V5 24/39] x86/microcode: Mop up early loading leftovers
Date: Tue, 17 Oct 2023 23:23:56 +0200 (CEST) [thread overview]
Message-ID: <20231017211723.298854846@linutronix.de> (raw)
In-Reply-To: 20231017200758.877560658@linutronix.de
From: Thomas Gleixner <tglx@linutronix.de>
Get rid of the initrd_gone hack which was required to keep
find_microcode_in_initrd() functional after init.
As find_microcode_in_initrd() is now only used during init, mark it
accordingly.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
arch/x86/kernel/cpu/microcode/core.c | 17 +----------------
arch/x86/kernel/cpu/microcode/internal.h | 1 -
2 files changed, 1 insertion(+), 17 deletions(-)
---
--- a/arch/x86/kernel/cpu/microcode/core.c
+++ b/arch/x86/kernel/cpu/microcode/core.c
@@ -44,8 +44,6 @@
static struct microcode_ops *microcode_ops;
bool dis_ucode_ldr = true;
-bool initrd_gone;
-
/*
* Synchronization.
*
@@ -180,15 +178,7 @@ void load_ucode_ap(void)
}
}
-/* Temporary workaround until find_microcode_in_initrd() is __init */
-static int __init mark_initrd_gone(void)
-{
- initrd_gone = true;
- return 0;
-}
-fs_initcall(mark_initrd_gone);
-
-struct cpio_data find_microcode_in_initrd(const char *path)
+struct cpio_data __init find_microcode_in_initrd(const char *path)
{
#ifdef CONFIG_BLK_DEV_INITRD
unsigned long start = 0;
@@ -216,12 +206,7 @@ struct cpio_data find_microcode_in_initr
* has the virtual address of the beginning of the initrd. It also
* possibly relocates the ramdisk. In either case, initrd_start contains
* the updated address so use that instead.
- *
- * initrd_gone is for the hotplug case where we've thrown out initrd
- * already.
*/
- if (initrd_gone)
- return (struct cpio_data){ NULL, 0, "" };
if (initrd_start)
start = initrd_start;
--- a/arch/x86/kernel/cpu/microcode/internal.h
+++ b/arch/x86/kernel/cpu/microcode/internal.h
@@ -86,7 +86,6 @@ static inline unsigned int x86_cpuid_fam
}
extern bool dis_ucode_ldr;
-extern bool initrd_gone;
#ifdef CONFIG_CPU_SUP_AMD
void load_ucode_amd_bsp(unsigned int family);
next prev parent reply other threads:[~2023-10-17 21:25 UTC|newest]
Thread overview: 70+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-17 21:23 [patch V5 00/39] x86/microcode: Cleanup and late loading enhancements Thomas Gleixner
2023-10-17 21:23 ` [patch V5 01/39] x86/boot/32: Disable stackprotector and tracing for mk_early_pgtbl_32() Thomas Gleixner
2023-10-17 21:23 ` [patch V5 02/39] x86/boot: Use __pa_nodebug() in mk_early_pgtbl_32() Thomas Gleixner
2023-10-20 11:38 ` [tip: x86/microcode] " tip-bot2 for Thomas Gleixner
2023-10-17 21:23 ` [patch V5 03/39] x86/boot/32: De-uglify the 2/3 level paging difference " Thomas Gleixner
2023-10-18 10:00 ` Borislav Petkov
2023-10-18 13:20 ` Thomas Gleixner
2023-10-18 16:28 ` Borislav Petkov
2023-10-20 11:38 ` [tip: x86/microcode] " tip-bot2 for Thomas Gleixner
2023-10-17 21:23 ` [patch V5 04/39] x86/boot/32: Restructure mk_early_pgtbl_32() Thomas Gleixner
2023-10-20 11:38 ` [tip: x86/microcode] " tip-bot2 for Thomas Gleixner
2023-10-17 21:23 ` [patch V5 05/39] x86/microcode: Provide CONFIG_MICROCODE_INITRD32 Thomas Gleixner
2023-10-20 11:38 ` [tip: x86/microcode] " tip-bot2 for Thomas Gleixner
2023-10-17 21:23 ` [patch V5 06/39] x86/boot/32: Temporarily map initrd for microcode loading Thomas Gleixner
2023-10-20 11:38 ` [tip: x86/microcode] " tip-bot2 for Thomas Gleixner
2023-10-17 21:23 ` [patch V5 07/39] x86/microcode/32: Move early loading after paging enable Thomas Gleixner
2023-10-20 11:38 ` [tip: x86/microcode] " tip-bot2 for Thomas Gleixner
2023-10-17 21:23 ` [patch V5 08/39] x86/microcode/intel: Rip out mixed stepping support for Intel CPUs Thomas Gleixner
2023-10-20 11:38 ` [tip: x86/microcode] " tip-bot2 for Ashok Raj
2023-10-17 21:23 ` [patch V5 09/39] x86/microcode/intel: Simplify scan_microcode() Thomas Gleixner
2023-10-17 21:23 ` [patch V5 10/39] x86/microcode/intel: Simplify and rename generic_load_microcode() Thomas Gleixner
2023-10-17 21:23 ` [patch V5 11/39] x86/microcode/intel: Cleanup code further Thomas Gleixner
2023-10-17 21:23 ` [patch V5 12/39] x86/microcode/intel: Simplify early loading Thomas Gleixner
2023-10-20 11:38 ` [tip: x86/microcode] " tip-bot2 for Thomas Gleixner
2023-10-24 13:21 ` tip-bot2 for Thomas Gleixner
2023-10-17 21:23 ` [patch V5 13/39] x86/microcode/intel: Save the microcode only after a successful late-load Thomas Gleixner
2023-10-17 21:23 ` [patch V5 14/39] x86/microcode/intel: Switch to kvmalloc() Thomas Gleixner
2023-10-17 21:23 ` [patch V5 15/39] x86/microcode/intel: Unify microcode apply() functions Thomas Gleixner
2023-10-20 11:37 ` [tip: x86/microcode] " tip-bot2 for Thomas Gleixner
2023-10-24 13:21 ` tip-bot2 for Thomas Gleixner
2023-10-17 21:23 ` [patch V5 16/39] x86/microcode/intel: Rework intel_cpu_collect_info() Thomas Gleixner
2023-10-20 11:37 ` [tip: x86/microcode] " tip-bot2 for Thomas Gleixner
2023-10-24 13:21 ` tip-bot2 for Thomas Gleixner
2023-10-17 21:23 ` [patch V5 17/39] x86/microcode/intel: Reuse intel_cpu_collect_info() Thomas Gleixner
2023-10-17 21:23 ` [patch V5 18/39] x86/microcode/intel: Rework intel_find_matching_signature() Thomas Gleixner
2023-10-17 21:23 ` [patch V5 19/39] x86/microcode: Remove pointless apply() invocation Thomas Gleixner
2023-10-20 11:37 ` [tip: x86/microcode] " tip-bot2 for Thomas Gleixner
2023-10-24 13:21 ` tip-bot2 for Thomas Gleixner
2023-10-17 21:23 ` [patch V5 20/39] x86/microcode/amd: Use correct per CPU ucode_cpu_info Thomas Gleixner
2023-10-17 21:23 ` [patch V5 21/39] x86/microcode/amd: Cache builtin microcode too Thomas Gleixner
2023-10-17 21:23 ` [patch V5 22/39] x86/microcode/amd: Cache builtin/initrd microcode early Thomas Gleixner
2023-10-20 11:37 ` [tip: x86/microcode] " tip-bot2 for Thomas Gleixner
2023-10-24 13:21 ` tip-bot2 for Thomas Gleixner
2023-10-17 21:23 ` [patch V5 23/39] x86/microcode/amd: Use cached microcode for AP load Thomas Gleixner
2023-10-20 11:37 ` [tip: x86/microcode] " tip-bot2 for Thomas Gleixner
2023-10-24 13:21 ` tip-bot2 for Thomas Gleixner
2023-10-17 21:23 ` Thomas Gleixner [this message]
2023-10-20 11:37 ` [tip: x86/microcode] x86/microcode: Mop up early loading leftovers tip-bot2 for Thomas Gleixner
2023-10-24 13:20 ` tip-bot2 for Thomas Gleixner
2023-10-17 21:23 ` [patch V5 25/39] x86/microcode: Get rid of the schedule work indirection Thomas Gleixner
2023-10-20 11:37 ` [tip: x86/microcode] " tip-bot2 for Thomas Gleixner
2023-10-24 13:20 ` tip-bot2 for Thomas Gleixner
2023-10-17 21:23 ` [patch V5 26/39] x86/microcode: Clean up mc_cpu_down_prep() Thomas Gleixner
2023-10-17 21:24 ` [patch V5 27/39] x86/microcode: Handle "nosmt" correctly Thomas Gleixner
2023-10-17 21:24 ` [patch V5 28/39] x86/microcode: Clarify the late load logic Thomas Gleixner
2023-10-17 21:24 ` [patch V5 29/39] x86/microcode: Sanitize __wait_for_cpus() Thomas Gleixner
2023-10-17 21:24 ` [patch V5 30/39] x86/microcode: Add per CPU result state Thomas Gleixner
2023-10-20 11:37 ` [tip: x86/microcode] " tip-bot2 for Thomas Gleixner
2023-10-24 13:20 ` tip-bot2 for Thomas Gleixner
2023-10-17 21:24 ` [patch V5 31/39] x86/microcode: Add per CPU control field Thomas Gleixner
2023-10-17 21:24 ` [patch V5 32/39] x86/microcode: Provide new control functions Thomas Gleixner
2023-10-17 21:24 ` [patch V5 33/39] x86/microcode: Replace the all-in-one rendevous handler Thomas Gleixner
2023-10-17 21:24 ` [patch V5 34/39] x86/microcode: Rendezvous and load in NMI Thomas Gleixner
2023-10-17 21:24 ` [patch V5 35/39] x86/microcode: Protect against instrumentation Thomas Gleixner
2023-10-17 21:24 ` [patch V5 36/39] x86/apic: Provide apic_force_nmi_on_cpu() Thomas Gleixner
2023-10-17 21:24 ` [patch V5 37/39] x86/microcode: Handle "offline" CPUs correctly Thomas Gleixner
2023-10-17 21:24 ` [patch V5 38/39] x86/microcode: Prepare for minimal revision check Thomas Gleixner
2023-10-20 11:37 ` [tip: x86/microcode] " tip-bot2 for Thomas Gleixner
2023-10-24 13:20 ` tip-bot2 for Thomas Gleixner
2023-10-17 21:24 ` [patch V5 39/39] x86/microcode/intel: Add a minimum required revision for late loading Thomas Gleixner
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