From: Peter Zijlstra <peterz@infradead.org>
To: Borislav Petkov <bp@alien8.de>
Cc: X86 ML <x86@kernel.org>,
Kishon VijayAbraham <Kishon.VijayAbraham@amd.com>,
LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 2/2] x86/barrier: Do not serialize MSR accesses on AMD
Date: Fri, 27 Oct 2023 20:56:41 +0200 [thread overview]
Message-ID: <20231027185641.GE26550@noisy.programming.kicks-ass.net> (raw)
In-Reply-To: <20231027153458.GMZTvYou1tlK6HD8/Y@fat_crate.local>
On Fri, Oct 27, 2023 at 05:34:58PM +0200, Borislav Petkov wrote:
> +static inline void weak_wrmsr_fence(void)
> +{
> + alternative("mfence; lfence", "", ALT_VENDOR(X86_VENDOR_AMD));
> +}
Well, you see, AFAICT the non-serializing MSRs thing is an Intel thing,
so everything !Intel wants this gone, no?
Definitely the Hygon thing wants this right along with AMD, because
that's basically AMD, no?
next prev parent reply other threads:[~2023-10-27 18:56 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-22 9:52 [PATCH] x86/barrier: Do not serialize MSR accesses on AMD Borislav Petkov
2023-07-03 12:54 ` Peter Zijlstra
2023-07-04 7:46 ` Borislav Petkov
2023-07-04 9:01 ` Peter Zijlstra
2023-07-04 9:22 ` Borislav Petkov
[not found] ` <20231027153327.GKZTvYR3qslaTUjtCT@fat_crate.local>
[not found] ` <20231027153418.GLZTvYejCkXb03rArO@fat_crate.local>
2023-10-27 18:11 ` [PATCH 1/2] x86/alternative: Add per-vendor patching Peter Zijlstra
2023-10-27 18:25 ` Borislav Petkov
[not found] ` <20231027153458.GMZTvYou1tlK6HD8/Y@fat_crate.local>
2023-10-27 18:56 ` Peter Zijlstra [this message]
2023-10-27 19:16 ` [PATCH 2/2] x86/barrier: Do not serialize MSR accesses on AMD Borislav Petkov
2023-10-27 19:29 ` Borislav Petkov
2023-10-27 20:09 ` Andrew Cooper
2023-10-27 20:23 ` Borislav Petkov
2023-10-29 10:35 ` [PATCH -v3] " Borislav Petkov
2023-11-02 11:08 ` [PATCH 2/2] " Borislav Petkov
2023-11-13 8:56 ` [tip: x86/cpu] " tip-bot2 for Borislav Petkov (AMD)
2023-11-13 9:21 ` tip-bot2 for Borislav Petkov (AMD)
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