* [PATCH 0/2] Add SDX75 support and its dependency
@ 2023-11-06 3:42 Qiang Yu
2023-11-06 3:42 ` [PATCH 1/2] bus: mhi: host: Add a separate timeout parameter for waiting ready Qiang Yu
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Qiang Yu @ 2023-11-06 3:42 UTC (permalink / raw)
To: mani, quic_jhugo
Cc: mhi, linux-arm-msm, linux-kernel, quic_cang, quic_mrana, Qiang Yu
This series add new configuration for SDX75 and new parameter
ready_timeout_ms for waiting ready state.
Qiang Yu (2):
bus: mhi: host: Add a separate timeout parameter for waiting ready
bus: mhi: host: pci_generic: Add SDX75 based modem support
drivers/bus/mhi/host/init.c | 1 +
drivers/bus/mhi/host/internal.h | 2 +-
drivers/bus/mhi/host/main.c | 5 +++--
drivers/bus/mhi/host/pci_generic.c | 22 ++++++++++++++++++++++
drivers/bus/mhi/host/pm.c | 24 +++++++++++++++++-------
include/linux/mhi.h | 4 ++++
6 files changed, 48 insertions(+), 10 deletions(-)
--
2.7.4
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH 1/2] bus: mhi: host: Add a separate timeout parameter for waiting ready 2023-11-06 3:42 [PATCH 0/2] Add SDX75 support and its dependency Qiang Yu @ 2023-11-06 3:42 ` Qiang Yu 2023-11-06 5:43 ` Manivannan Sadhasivam 2023-11-06 3:42 ` [PATCH 2/2] bus: mhi: host: pci_generic: Add SDX75 based modem support Qiang Yu 2023-11-06 9:39 ` [PATCH 0/2] Add SDX75 support and its dependency Dmitry Baryshkov 2 siblings, 1 reply; 6+ messages in thread From: Qiang Yu @ 2023-11-06 3:42 UTC (permalink / raw) To: mani, quic_jhugo Cc: mhi, linux-arm-msm, linux-kernel, quic_cang, quic_mrana, Qiang Yu Some devices(eg. SDX75) take longer than expected (default, 8 seconds) to set ready after reboot. Hence add optional ready timeout parameter and pass the appropriate timeout value to mhi_poll_reg_field() to wait enough for device ready as part of power up sequence. Signed-off-by: Qiang Yu <quic_qianyu@quicinc.com> --- drivers/bus/mhi/host/init.c | 1 + drivers/bus/mhi/host/internal.h | 2 +- drivers/bus/mhi/host/main.c | 5 +++-- drivers/bus/mhi/host/pm.c | 24 +++++++++++++++++------- include/linux/mhi.h | 4 ++++ 5 files changed, 26 insertions(+), 10 deletions(-) diff --git a/drivers/bus/mhi/host/init.c b/drivers/bus/mhi/host/init.c index f78aefd..65ceac1 100644 --- a/drivers/bus/mhi/host/init.c +++ b/drivers/bus/mhi/host/init.c @@ -881,6 +881,7 @@ static int parse_config(struct mhi_controller *mhi_cntrl, if (!mhi_cntrl->timeout_ms) mhi_cntrl->timeout_ms = MHI_TIMEOUT_MS; + mhi_cntrl->ready_timeout_ms = config->ready_timeout_ms; mhi_cntrl->bounce_buf = config->use_bounce_buf; mhi_cntrl->buffer_len = config->buf_len; if (!mhi_cntrl->buffer_len) diff --git a/drivers/bus/mhi/host/internal.h b/drivers/bus/mhi/host/internal.h index 2e139e7..30ac415 100644 --- a/drivers/bus/mhi/host/internal.h +++ b/drivers/bus/mhi/host/internal.h @@ -321,7 +321,7 @@ int __must_check mhi_read_reg_field(struct mhi_controller *mhi_cntrl, u32 *out); int __must_check mhi_poll_reg_field(struct mhi_controller *mhi_cntrl, void __iomem *base, u32 offset, u32 mask, - u32 val, u32 delayus); + u32 val, u32 delayus, u32 timeout_ms); void mhi_write_reg(struct mhi_controller *mhi_cntrl, void __iomem *base, u32 offset, u32 val); int __must_check mhi_write_reg_field(struct mhi_controller *mhi_cntrl, diff --git a/drivers/bus/mhi/host/main.c b/drivers/bus/mhi/host/main.c index dcf627b..6cf1145 100644 --- a/drivers/bus/mhi/host/main.c +++ b/drivers/bus/mhi/host/main.c @@ -40,10 +40,11 @@ int __must_check mhi_read_reg_field(struct mhi_controller *mhi_cntrl, int __must_check mhi_poll_reg_field(struct mhi_controller *mhi_cntrl, void __iomem *base, u32 offset, - u32 mask, u32 val, u32 delayus) + u32 mask, u32 val, u32 delayus, + u32 timeout_ms) { int ret; - u32 out, retry = (mhi_cntrl->timeout_ms * 1000) / delayus; + u32 out, retry = (timeout_ms * 1000) / delayus; while (retry--) { ret = mhi_read_reg_field(mhi_cntrl, base, offset, mask, &out); diff --git a/drivers/bus/mhi/host/pm.c b/drivers/bus/mhi/host/pm.c index 8a4362d..a2f2fee 100644 --- a/drivers/bus/mhi/host/pm.c +++ b/drivers/bus/mhi/host/pm.c @@ -163,6 +163,7 @@ int mhi_ready_state_transition(struct mhi_controller *mhi_cntrl) enum mhi_pm_state cur_state; struct device *dev = &mhi_cntrl->mhi_dev->dev; u32 interval_us = 25000; /* poll register field every 25 milliseconds */ + u32 timeout_ms; int ret, i; /* Check if device entered error state */ @@ -173,14 +174,18 @@ int mhi_ready_state_transition(struct mhi_controller *mhi_cntrl) /* Wait for RESET to be cleared and READY bit to be set by the device */ ret = mhi_poll_reg_field(mhi_cntrl, mhi_cntrl->regs, MHICTRL, - MHICTRL_RESET_MASK, 0, interval_us); + MHICTRL_RESET_MASK, 0, interval_us, + mhi_cntrl->timeout_ms); if (ret) { dev_err(dev, "Device failed to clear MHI Reset\n"); return ret; } + timeout_ms = mhi_cntrl->ready_timeout_ms ? + mhi_cntrl->ready_timeout_ms : mhi_cntrl->timeout_ms; ret = mhi_poll_reg_field(mhi_cntrl, mhi_cntrl->regs, MHISTATUS, - MHISTATUS_READY_MASK, 1, interval_us); + MHISTATUS_READY_MASK, 1, interval_us, + timeout_ms); if (ret) { dev_err(dev, "Device failed to enter MHI Ready\n"); return ret; @@ -479,7 +484,7 @@ static void mhi_pm_disable_transition(struct mhi_controller *mhi_cntrl) /* Wait for the reset bit to be cleared by the device */ ret = mhi_poll_reg_field(mhi_cntrl, mhi_cntrl->regs, MHICTRL, - MHICTRL_RESET_MASK, 0, 25000); + MHICTRL_RESET_MASK, 0, 25000, mhi_cntrl->timeout_ms); if (ret) dev_err(dev, "Device failed to clear MHI Reset\n"); @@ -492,8 +497,8 @@ static void mhi_pm_disable_transition(struct mhi_controller *mhi_cntrl) if (!MHI_IN_PBL(mhi_get_exec_env(mhi_cntrl))) { /* wait for ready to be set */ ret = mhi_poll_reg_field(mhi_cntrl, mhi_cntrl->regs, - MHISTATUS, - MHISTATUS_READY_MASK, 1, 25000); + MHISTATUS, MHISTATUS_READY_MASK, + 1, 25000, mhi_cntrl->timeout_ms); if (ret) dev_err(dev, "Device failed to enter READY state\n"); } @@ -1111,7 +1116,8 @@ int mhi_async_power_up(struct mhi_controller *mhi_cntrl) if (state == MHI_STATE_SYS_ERR) { mhi_set_mhi_state(mhi_cntrl, MHI_STATE_RESET); ret = mhi_poll_reg_field(mhi_cntrl, mhi_cntrl->regs, MHICTRL, - MHICTRL_RESET_MASK, 0, interval_us); + MHICTRL_RESET_MASK, 0, interval_us, + mhi_cntrl->timeout_ms); if (ret) { dev_info(dev, "Failed to reset MHI due to syserr state\n"); goto error_exit; @@ -1202,14 +1208,18 @@ EXPORT_SYMBOL_GPL(mhi_power_down); int mhi_sync_power_up(struct mhi_controller *mhi_cntrl) { int ret = mhi_async_power_up(mhi_cntrl); + u32 timeout_ms; if (ret) return ret; + /* Some devices need more time to set ready during power up */ + timeout_ms = mhi_cntrl->ready_timeout_ms ? + mhi_cntrl->ready_timeout_ms : mhi_cntrl->timeout_ms; wait_event_timeout(mhi_cntrl->state_event, MHI_IN_MISSION_MODE(mhi_cntrl->ee) || MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state), - msecs_to_jiffies(mhi_cntrl->timeout_ms)); + msecs_to_jiffies(timeout_ms)); ret = (MHI_IN_MISSION_MODE(mhi_cntrl->ee)) ? 0 : -ETIMEDOUT; if (ret) diff --git a/include/linux/mhi.h b/include/linux/mhi.h index 039943e..d0f9b522 100644 --- a/include/linux/mhi.h +++ b/include/linux/mhi.h @@ -266,6 +266,7 @@ struct mhi_event_config { * struct mhi_controller_config - Root MHI controller configuration * @max_channels: Maximum number of channels supported * @timeout_ms: Timeout value for operations. 0 means use default + * @ready_timeout_ms: Timeout value for waiting device to be ready (optional) * @buf_len: Size of automatically allocated buffers. 0 means use default * @num_channels: Number of channels defined in @ch_cfg * @ch_cfg: Array of defined channels @@ -277,6 +278,7 @@ struct mhi_event_config { struct mhi_controller_config { u32 max_channels; u32 timeout_ms; + u32 ready_timeout_ms; u32 buf_len; u32 num_channels; const struct mhi_channel_config *ch_cfg; @@ -330,6 +332,7 @@ struct mhi_controller_config { * @pm_mutex: Mutex for suspend/resume operation * @pm_lock: Lock for protecting MHI power management state * @timeout_ms: Timeout in ms for state transitions + * @ready_timeout_ms: Timeout in ms for waiting device to be ready (optional) * @pm_state: MHI power management state * @db_access: DB access states * @ee: MHI device execution environment @@ -419,6 +422,7 @@ struct mhi_controller { struct mutex pm_mutex; rwlock_t pm_lock; u32 timeout_ms; + u32 ready_timeout_ms; u32 pm_state; u32 db_access; enum mhi_ee_type ee; -- 2.7.4 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] bus: mhi: host: Add a separate timeout parameter for waiting ready 2023-11-06 3:42 ` [PATCH 1/2] bus: mhi: host: Add a separate timeout parameter for waiting ready Qiang Yu @ 2023-11-06 5:43 ` Manivannan Sadhasivam 0 siblings, 0 replies; 6+ messages in thread From: Manivannan Sadhasivam @ 2023-11-06 5:43 UTC (permalink / raw) To: Qiang Yu Cc: quic_jhugo, mhi, linux-arm-msm, linux-kernel, quic_cang, quic_mrana On Mon, Nov 06, 2023 at 11:42:51AM +0800, Qiang Yu wrote: > Some devices(eg. SDX75) take longer than expected (default, 8 seconds) to > set ready after reboot. Hence add optional ready timeout parameter and pass > the appropriate timeout value to mhi_poll_reg_field() to wait enough for > device ready as part of power up sequence. > > Signed-off-by: Qiang Yu <quic_qianyu@quicinc.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> - Mani > --- > drivers/bus/mhi/host/init.c | 1 + > drivers/bus/mhi/host/internal.h | 2 +- > drivers/bus/mhi/host/main.c | 5 +++-- > drivers/bus/mhi/host/pm.c | 24 +++++++++++++++++------- > include/linux/mhi.h | 4 ++++ > 5 files changed, 26 insertions(+), 10 deletions(-) > > diff --git a/drivers/bus/mhi/host/init.c b/drivers/bus/mhi/host/init.c > index f78aefd..65ceac1 100644 > --- a/drivers/bus/mhi/host/init.c > +++ b/drivers/bus/mhi/host/init.c > @@ -881,6 +881,7 @@ static int parse_config(struct mhi_controller *mhi_cntrl, > if (!mhi_cntrl->timeout_ms) > mhi_cntrl->timeout_ms = MHI_TIMEOUT_MS; > > + mhi_cntrl->ready_timeout_ms = config->ready_timeout_ms; > mhi_cntrl->bounce_buf = config->use_bounce_buf; > mhi_cntrl->buffer_len = config->buf_len; > if (!mhi_cntrl->buffer_len) > diff --git a/drivers/bus/mhi/host/internal.h b/drivers/bus/mhi/host/internal.h > index 2e139e7..30ac415 100644 > --- a/drivers/bus/mhi/host/internal.h > +++ b/drivers/bus/mhi/host/internal.h > @@ -321,7 +321,7 @@ int __must_check mhi_read_reg_field(struct mhi_controller *mhi_cntrl, > u32 *out); > int __must_check mhi_poll_reg_field(struct mhi_controller *mhi_cntrl, > void __iomem *base, u32 offset, u32 mask, > - u32 val, u32 delayus); > + u32 val, u32 delayus, u32 timeout_ms); > void mhi_write_reg(struct mhi_controller *mhi_cntrl, void __iomem *base, > u32 offset, u32 val); > int __must_check mhi_write_reg_field(struct mhi_controller *mhi_cntrl, > diff --git a/drivers/bus/mhi/host/main.c b/drivers/bus/mhi/host/main.c > index dcf627b..6cf1145 100644 > --- a/drivers/bus/mhi/host/main.c > +++ b/drivers/bus/mhi/host/main.c > @@ -40,10 +40,11 @@ int __must_check mhi_read_reg_field(struct mhi_controller *mhi_cntrl, > > int __must_check mhi_poll_reg_field(struct mhi_controller *mhi_cntrl, > void __iomem *base, u32 offset, > - u32 mask, u32 val, u32 delayus) > + u32 mask, u32 val, u32 delayus, > + u32 timeout_ms) > { > int ret; > - u32 out, retry = (mhi_cntrl->timeout_ms * 1000) / delayus; > + u32 out, retry = (timeout_ms * 1000) / delayus; > > while (retry--) { > ret = mhi_read_reg_field(mhi_cntrl, base, offset, mask, &out); > diff --git a/drivers/bus/mhi/host/pm.c b/drivers/bus/mhi/host/pm.c > index 8a4362d..a2f2fee 100644 > --- a/drivers/bus/mhi/host/pm.c > +++ b/drivers/bus/mhi/host/pm.c > @@ -163,6 +163,7 @@ int mhi_ready_state_transition(struct mhi_controller *mhi_cntrl) > enum mhi_pm_state cur_state; > struct device *dev = &mhi_cntrl->mhi_dev->dev; > u32 interval_us = 25000; /* poll register field every 25 milliseconds */ > + u32 timeout_ms; > int ret, i; > > /* Check if device entered error state */ > @@ -173,14 +174,18 @@ int mhi_ready_state_transition(struct mhi_controller *mhi_cntrl) > > /* Wait for RESET to be cleared and READY bit to be set by the device */ > ret = mhi_poll_reg_field(mhi_cntrl, mhi_cntrl->regs, MHICTRL, > - MHICTRL_RESET_MASK, 0, interval_us); > + MHICTRL_RESET_MASK, 0, interval_us, > + mhi_cntrl->timeout_ms); > if (ret) { > dev_err(dev, "Device failed to clear MHI Reset\n"); > return ret; > } > > + timeout_ms = mhi_cntrl->ready_timeout_ms ? > + mhi_cntrl->ready_timeout_ms : mhi_cntrl->timeout_ms; > ret = mhi_poll_reg_field(mhi_cntrl, mhi_cntrl->regs, MHISTATUS, > - MHISTATUS_READY_MASK, 1, interval_us); > + MHISTATUS_READY_MASK, 1, interval_us, > + timeout_ms); > if (ret) { > dev_err(dev, "Device failed to enter MHI Ready\n"); > return ret; > @@ -479,7 +484,7 @@ static void mhi_pm_disable_transition(struct mhi_controller *mhi_cntrl) > > /* Wait for the reset bit to be cleared by the device */ > ret = mhi_poll_reg_field(mhi_cntrl, mhi_cntrl->regs, MHICTRL, > - MHICTRL_RESET_MASK, 0, 25000); > + MHICTRL_RESET_MASK, 0, 25000, mhi_cntrl->timeout_ms); > if (ret) > dev_err(dev, "Device failed to clear MHI Reset\n"); > > @@ -492,8 +497,8 @@ static void mhi_pm_disable_transition(struct mhi_controller *mhi_cntrl) > if (!MHI_IN_PBL(mhi_get_exec_env(mhi_cntrl))) { > /* wait for ready to be set */ > ret = mhi_poll_reg_field(mhi_cntrl, mhi_cntrl->regs, > - MHISTATUS, > - MHISTATUS_READY_MASK, 1, 25000); > + MHISTATUS, MHISTATUS_READY_MASK, > + 1, 25000, mhi_cntrl->timeout_ms); > if (ret) > dev_err(dev, "Device failed to enter READY state\n"); > } > @@ -1111,7 +1116,8 @@ int mhi_async_power_up(struct mhi_controller *mhi_cntrl) > if (state == MHI_STATE_SYS_ERR) { > mhi_set_mhi_state(mhi_cntrl, MHI_STATE_RESET); > ret = mhi_poll_reg_field(mhi_cntrl, mhi_cntrl->regs, MHICTRL, > - MHICTRL_RESET_MASK, 0, interval_us); > + MHICTRL_RESET_MASK, 0, interval_us, > + mhi_cntrl->timeout_ms); > if (ret) { > dev_info(dev, "Failed to reset MHI due to syserr state\n"); > goto error_exit; > @@ -1202,14 +1208,18 @@ EXPORT_SYMBOL_GPL(mhi_power_down); > int mhi_sync_power_up(struct mhi_controller *mhi_cntrl) > { > int ret = mhi_async_power_up(mhi_cntrl); > + u32 timeout_ms; > > if (ret) > return ret; > > + /* Some devices need more time to set ready during power up */ > + timeout_ms = mhi_cntrl->ready_timeout_ms ? > + mhi_cntrl->ready_timeout_ms : mhi_cntrl->timeout_ms; > wait_event_timeout(mhi_cntrl->state_event, > MHI_IN_MISSION_MODE(mhi_cntrl->ee) || > MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state), > - msecs_to_jiffies(mhi_cntrl->timeout_ms)); > + msecs_to_jiffies(timeout_ms)); > > ret = (MHI_IN_MISSION_MODE(mhi_cntrl->ee)) ? 0 : -ETIMEDOUT; > if (ret) > diff --git a/include/linux/mhi.h b/include/linux/mhi.h > index 039943e..d0f9b522 100644 > --- a/include/linux/mhi.h > +++ b/include/linux/mhi.h > @@ -266,6 +266,7 @@ struct mhi_event_config { > * struct mhi_controller_config - Root MHI controller configuration > * @max_channels: Maximum number of channels supported > * @timeout_ms: Timeout value for operations. 0 means use default > + * @ready_timeout_ms: Timeout value for waiting device to be ready (optional) > * @buf_len: Size of automatically allocated buffers. 0 means use default > * @num_channels: Number of channels defined in @ch_cfg > * @ch_cfg: Array of defined channels > @@ -277,6 +278,7 @@ struct mhi_event_config { > struct mhi_controller_config { > u32 max_channels; > u32 timeout_ms; > + u32 ready_timeout_ms; > u32 buf_len; > u32 num_channels; > const struct mhi_channel_config *ch_cfg; > @@ -330,6 +332,7 @@ struct mhi_controller_config { > * @pm_mutex: Mutex for suspend/resume operation > * @pm_lock: Lock for protecting MHI power management state > * @timeout_ms: Timeout in ms for state transitions > + * @ready_timeout_ms: Timeout in ms for waiting device to be ready (optional) > * @pm_state: MHI power management state > * @db_access: DB access states > * @ee: MHI device execution environment > @@ -419,6 +422,7 @@ struct mhi_controller { > struct mutex pm_mutex; > rwlock_t pm_lock; > u32 timeout_ms; > + u32 ready_timeout_ms; > u32 pm_state; > u32 db_access; > enum mhi_ee_type ee; > -- > 2.7.4 > > -- மணிவண்ணன் சதாசிவம் ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 2/2] bus: mhi: host: pci_generic: Add SDX75 based modem support 2023-11-06 3:42 [PATCH 0/2] Add SDX75 support and its dependency Qiang Yu 2023-11-06 3:42 ` [PATCH 1/2] bus: mhi: host: Add a separate timeout parameter for waiting ready Qiang Yu @ 2023-11-06 3:42 ` Qiang Yu 2023-11-06 5:44 ` Manivannan Sadhasivam 2023-11-06 9:39 ` [PATCH 0/2] Add SDX75 support and its dependency Dmitry Baryshkov 2 siblings, 1 reply; 6+ messages in thread From: Qiang Yu @ 2023-11-06 3:42 UTC (permalink / raw) To: mani, quic_jhugo Cc: mhi, linux-arm-msm, linux-kernel, quic_cang, quic_mrana, Qiang Yu Add generic info for SDX75 based modems. SDX75 takes longer to set ready during power up. Hence use separate configuration. Signed-off-by: Qiang Yu <quic_qianyu@quicinc.com> --- drivers/bus/mhi/host/pci_generic.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_generic.c index 08f3f03..cd6cd14 100644 --- a/drivers/bus/mhi/host/pci_generic.c +++ b/drivers/bus/mhi/host/pci_generic.c @@ -269,6 +269,16 @@ static struct mhi_event_config modem_qcom_v1_mhi_events[] = { MHI_EVENT_CONFIG_HW_DATA(5, 2048, 101) }; +static const struct mhi_controller_config modem_qcom_v2_mhiv_config = { + .max_channels = 128, + .timeout_ms = 8000, + .ready_timeout_ms = 50000, + .num_channels = ARRAY_SIZE(modem_qcom_v1_mhi_channels), + .ch_cfg = modem_qcom_v1_mhi_channels, + .num_events = ARRAY_SIZE(modem_qcom_v1_mhi_events), + .event_cfg = modem_qcom_v1_mhi_events, +}; + static const struct mhi_controller_config modem_qcom_v1_mhiv_config = { .max_channels = 128, .timeout_ms = 8000, @@ -278,6 +288,16 @@ static const struct mhi_controller_config modem_qcom_v1_mhiv_config = { .event_cfg = modem_qcom_v1_mhi_events, }; +static const struct mhi_pci_dev_info mhi_qcom_sdx75_info = { + .name = "qcom-sdx75m", + .fw = "qcom/sdx75m/xbl.elf", + .edl = "qcom/sdx75m/edl.mbn", + .config = &modem_qcom_v2_mhiv_config, + .bar_num = MHI_PCI_DEFAULT_BAR_NUM, + .dma_data_width = 32, + .sideband_wake = false, +}; + static const struct mhi_pci_dev_info mhi_qcom_sdx65_info = { .name = "qcom-sdx65m", .fw = "qcom/sdx65m/xbl.elf", @@ -600,6 +620,8 @@ static const struct pci_device_id mhi_pci_id_table[] = { .driver_data = (kernel_ulong_t) &mhi_telit_fn990_info }, { PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0308), .driver_data = (kernel_ulong_t) &mhi_qcom_sdx65_info }, + { PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0309), + .driver_data = (kernel_ulong_t) &mhi_qcom_sdx75_info }, { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x1001), /* EM120R-GL (sdx24) */ .driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info }, { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x1002), /* EM160R-GL (sdx24) */ -- 2.7.4 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] bus: mhi: host: pci_generic: Add SDX75 based modem support 2023-11-06 3:42 ` [PATCH 2/2] bus: mhi: host: pci_generic: Add SDX75 based modem support Qiang Yu @ 2023-11-06 5:44 ` Manivannan Sadhasivam 0 siblings, 0 replies; 6+ messages in thread From: Manivannan Sadhasivam @ 2023-11-06 5:44 UTC (permalink / raw) To: Qiang Yu Cc: quic_jhugo, mhi, linux-arm-msm, linux-kernel, quic_cang, quic_mrana On Mon, Nov 06, 2023 at 11:42:52AM +0800, Qiang Yu wrote: > Add generic info for SDX75 based modems. SDX75 takes longer to set ready > during power up. Hence use separate configuration. > > Signed-off-by: Qiang Yu <quic_qianyu@quicinc.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> - Mani > --- > drivers/bus/mhi/host/pci_generic.c | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > > diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_generic.c > index 08f3f03..cd6cd14 100644 > --- a/drivers/bus/mhi/host/pci_generic.c > +++ b/drivers/bus/mhi/host/pci_generic.c > @@ -269,6 +269,16 @@ static struct mhi_event_config modem_qcom_v1_mhi_events[] = { > MHI_EVENT_CONFIG_HW_DATA(5, 2048, 101) > }; > > +static const struct mhi_controller_config modem_qcom_v2_mhiv_config = { > + .max_channels = 128, > + .timeout_ms = 8000, > + .ready_timeout_ms = 50000, > + .num_channels = ARRAY_SIZE(modem_qcom_v1_mhi_channels), > + .ch_cfg = modem_qcom_v1_mhi_channels, > + .num_events = ARRAY_SIZE(modem_qcom_v1_mhi_events), > + .event_cfg = modem_qcom_v1_mhi_events, > +}; > + > static const struct mhi_controller_config modem_qcom_v1_mhiv_config = { > .max_channels = 128, > .timeout_ms = 8000, > @@ -278,6 +288,16 @@ static const struct mhi_controller_config modem_qcom_v1_mhiv_config = { > .event_cfg = modem_qcom_v1_mhi_events, > }; > > +static const struct mhi_pci_dev_info mhi_qcom_sdx75_info = { > + .name = "qcom-sdx75m", > + .fw = "qcom/sdx75m/xbl.elf", > + .edl = "qcom/sdx75m/edl.mbn", > + .config = &modem_qcom_v2_mhiv_config, > + .bar_num = MHI_PCI_DEFAULT_BAR_NUM, > + .dma_data_width = 32, > + .sideband_wake = false, > +}; > + > static const struct mhi_pci_dev_info mhi_qcom_sdx65_info = { > .name = "qcom-sdx65m", > .fw = "qcom/sdx65m/xbl.elf", > @@ -600,6 +620,8 @@ static const struct pci_device_id mhi_pci_id_table[] = { > .driver_data = (kernel_ulong_t) &mhi_telit_fn990_info }, > { PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0308), > .driver_data = (kernel_ulong_t) &mhi_qcom_sdx65_info }, > + { PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0309), > + .driver_data = (kernel_ulong_t) &mhi_qcom_sdx75_info }, > { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x1001), /* EM120R-GL (sdx24) */ > .driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info }, > { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x1002), /* EM160R-GL (sdx24) */ > -- > 2.7.4 > > -- மணிவண்ணன் சதாசிவம் ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 0/2] Add SDX75 support and its dependency 2023-11-06 3:42 [PATCH 0/2] Add SDX75 support and its dependency Qiang Yu 2023-11-06 3:42 ` [PATCH 1/2] bus: mhi: host: Add a separate timeout parameter for waiting ready Qiang Yu 2023-11-06 3:42 ` [PATCH 2/2] bus: mhi: host: pci_generic: Add SDX75 based modem support Qiang Yu @ 2023-11-06 9:39 ` Dmitry Baryshkov 2 siblings, 0 replies; 6+ messages in thread From: Dmitry Baryshkov @ 2023-11-06 9:39 UTC (permalink / raw) To: Qiang Yu Cc: mani, quic_jhugo, mhi, linux-arm-msm, linux-kernel, quic_cang, quic_mrana On Mon, 6 Nov 2023 at 05:43, Qiang Yu <quic_qianyu@quicinc.com> wrote: > > This series add new configuration for SDX75 and new parameter Qualcomm SDX75. > ready_timeout_ms for waiting ready state. Please follow the same subject style for the cover letter subjects. This cover letter looks as if it was adding support for the SDX75 platform to the whole kernel. > > Qiang Yu (2): > bus: mhi: host: Add a separate timeout parameter for waiting ready > bus: mhi: host: pci_generic: Add SDX75 based modem support > > drivers/bus/mhi/host/init.c | 1 + > drivers/bus/mhi/host/internal.h | 2 +- > drivers/bus/mhi/host/main.c | 5 +++-- > drivers/bus/mhi/host/pci_generic.c | 22 ++++++++++++++++++++++ > drivers/bus/mhi/host/pm.c | 24 +++++++++++++++++------- > include/linux/mhi.h | 4 ++++ > 6 files changed, 48 insertions(+), 10 deletions(-) > > -- > 2.7.4 > -- With best wishes Dmitry ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2023-11-06 9:40 UTC | newest] Thread overview: 6+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2023-11-06 3:42 [PATCH 0/2] Add SDX75 support and its dependency Qiang Yu 2023-11-06 3:42 ` [PATCH 1/2] bus: mhi: host: Add a separate timeout parameter for waiting ready Qiang Yu 2023-11-06 5:43 ` Manivannan Sadhasivam 2023-11-06 3:42 ` [PATCH 2/2] bus: mhi: host: pci_generic: Add SDX75 based modem support Qiang Yu 2023-11-06 5:44 ` Manivannan Sadhasivam 2023-11-06 9:39 ` [PATCH 0/2] Add SDX75 support and its dependency Dmitry Baryshkov
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