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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id ec21-20020a0568708c1500b001e5ad4b2f65sm2216550oab.19.2023.11.16.08.36.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Nov 2023 08:36:03 -0800 (PST) Received: (nullmailer pid 2446073 invoked by uid 1000); Thu, 16 Nov 2023 16:36:02 -0000 Date: Thu, 16 Nov 2023 10:36:02 -0600 From: Rob Herring To: Jisheng Zhang Cc: Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Chao Wei , Chen Wang , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: Re: [PATCH 1/2] riscv: dts: cv1800b: add pinctrl node for cv1800b Message-ID: <20231116163602.GA2440245-robh@kernel.org> References: <20231113005702.2467-1-jszhang@kernel.org> <20231113005702.2467-2-jszhang@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20231113005702.2467-2-jszhang@kernel.org> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Nov 13, 2023 at 08:57:01AM +0800, Jisheng Zhang wrote: > Add the reset device tree node to cv1800b SoC reusing the > pinctrl-single driver. > > Signed-off-by: Jisheng Zhang > --- > arch/riscv/boot/dts/sophgo/cv-pinctrl.h | 19 +++++++++++++++++++ > arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 10 ++++++++++ > 2 files changed, 29 insertions(+) > create mode 100644 arch/riscv/boot/dts/sophgo/cv-pinctrl.h > > diff --git a/arch/riscv/boot/dts/sophgo/cv-pinctrl.h b/arch/riscv/boot/dts/sophgo/cv-pinctrl.h > new file mode 100644 > index 000000000000..ed78b6fb3142 > --- /dev/null > +++ b/arch/riscv/boot/dts/sophgo/cv-pinctrl.h > @@ -0,0 +1,19 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ Please match the licensing of the file(s) that include this. Not that there really anything > +/* > + * This header provides constants for pinctrl bindings for Sophgo CV* SoC. > + * > + * Copyright (C) 2023 Jisheng Zhang > + */ > +#ifndef _DTS_RISCV_SOPHGO_CV_PINCTRL_H > +#define _DTS_RISCV_SOPHGO_CV_PINCTRL_H > + > +#define MUX_M0 0 > +#define MUX_M1 1 > +#define MUX_M2 2 > +#define MUX_M3 3 > +#define MUX_M4 4 > +#define MUX_M5 5 > +#define MUX_M6 6 > +#define MUX_M7 7 I find defines with the number in the name to be somewhat pointless. > + > +#endif > diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi > index e04df04a91c0..7a44d8e8672b 100644 > --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi > +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi > @@ -6,6 +6,8 @@ > #include > #include > > +#include "cv-pinctrl.h" > + > / { > compatible = "sophgo,cv1800b"; > #address-cells = <1>; > @@ -55,6 +57,14 @@ soc { > dma-noncoherent; > ranges; > > + pinctrl0: pinctrl@3001000 { > + compatible = "pinctrl-single"; > + reg = <0x3001000 0x130>; > + #pinctrl-cells = <1>; > + pinctrl-single,register-width = <32>; > + pinctrl-single,function-mask = <0x00000007>; > + }; Even more pointless is the defines are not even used. > + > rst: reset-controller@3003000 { > compatible = "sophgo,cv1800b-reset"; > reg = <0x03003000 0x1000>; > -- > 2.42.0 >