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From: "David E. Box" <david.e.box@linux.intel.com>
To: linux-kernel@vger.kernel.org,
	platform-driver-x86@vger.kernel.org,
	ilpo.jarvinen@linux.intel.com, rajvi.jingar@linux.intel.com
Subject: [PATCH V5 07/20] platform/x86/intel/vsec: Add base address field
Date: Wed, 22 Nov 2023 20:03:42 -0800	[thread overview]
Message-ID: <20231123040355.82139-8-david.e.box@linux.intel.com> (raw)
In-Reply-To: <20231123040355.82139-1-david.e.box@linux.intel.com>

Some devices may emulate PCI VSEC capabilities in MMIO. In such cases the
BAR is not readable from a config space. Provide a field for drivers to
indicate the base address to be used.

Signed-off-by: David E. Box <david.e.box@linux.intel.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
---
V5 - No change

V4 - No change

V3 - No change

V2 - No change

 drivers/platform/x86/intel/pmt/class.c | 14 +++++++++++---
 drivers/platform/x86/intel/vsec.c      | 10 ++++++++--
 drivers/platform/x86/intel/vsec.h      |  2 ++
 3 files changed, 21 insertions(+), 5 deletions(-)

diff --git a/drivers/platform/x86/intel/pmt/class.c b/drivers/platform/x86/intel/pmt/class.c
index 2ad91d2fd954..32608baaa56c 100644
--- a/drivers/platform/x86/intel/pmt/class.c
+++ b/drivers/platform/x86/intel/pmt/class.c
@@ -160,10 +160,11 @@ static struct class intel_pmt_class = {
 
 static int intel_pmt_populate_entry(struct intel_pmt_entry *entry,
 				    struct intel_pmt_header *header,
-				    struct device *dev,
+				    struct intel_vsec_device *ivdev,
 				    struct resource *disc_res)
 {
-	struct pci_dev *pci_dev = to_pci_dev(dev->parent);
+	struct pci_dev *pci_dev = ivdev->pcidev;
+	struct device *dev = &ivdev->auxdev.dev;
 	u8 bir;
 
 	/*
@@ -215,6 +216,13 @@ static int intel_pmt_populate_entry(struct intel_pmt_entry *entry,
 
 		break;
 	case ACCESS_BARID:
+		/* Use the provided base address if it exists */
+		if (ivdev->base_addr) {
+			entry->base_addr = ivdev->base_addr +
+				   GET_ADDRESS(header->base_offset);
+			break;
+		}
+
 		/*
 		 * If another BAR was specified then the base offset
 		 * represents the offset within that BAR. SO retrieve the
@@ -319,7 +327,7 @@ int intel_pmt_dev_create(struct intel_pmt_entry *entry, struct intel_pmt_namespa
 	if (ret)
 		return ret;
 
-	ret = intel_pmt_populate_entry(entry, &header, dev, disc_res);
+	ret = intel_pmt_populate_entry(entry, &header, intel_vsec_dev, disc_res);
 	if (ret)
 		return ret;
 
diff --git a/drivers/platform/x86/intel/vsec.c b/drivers/platform/x86/intel/vsec.c
index 03eabb7d3d3d..c95060c5682c 100644
--- a/drivers/platform/x86/intel/vsec.c
+++ b/drivers/platform/x86/intel/vsec.c
@@ -161,6 +161,7 @@ static int intel_vsec_add_dev(struct pci_dev *pdev, struct intel_vsec_header *he
 	struct resource *tmp;
 	struct device *parent;
 	unsigned long quirks = info->quirks;
+	u64 base_addr;
 	int i;
 
 	if (info->parent)
@@ -192,14 +193,18 @@ static int intel_vsec_add_dev(struct pci_dev *pdev, struct intel_vsec_header *he
 	if (quirks & VSEC_QUIRK_TABLE_SHIFT)
 		header->offset >>= TABLE_OFFSET_SHIFT;
 
+	if (info->base_addr)
+		base_addr = info->base_addr;
+	else
+		base_addr = pdev->resource[header->tbir].start;
+
 	/*
 	 * The DVSEC/VSEC contains the starting offset and count for a block of
 	 * discovery tables. Create a resource array of these tables to the
 	 * auxiliary device driver.
 	 */
 	for (i = 0, tmp = res; i < header->num_entries; i++, tmp++) {
-		tmp->start = pdev->resource[header->tbir].start +
-			     header->offset + i * (header->entry_size * sizeof(u32));
+		tmp->start = base_addr + header->offset + i * (header->entry_size * sizeof(u32));
 		tmp->end = tmp->start + (header->entry_size * sizeof(u32)) - 1;
 		tmp->flags = IORESOURCE_MEM;
 
@@ -214,6 +219,7 @@ static int intel_vsec_add_dev(struct pci_dev *pdev, struct intel_vsec_header *he
 	intel_vsec_dev->resource = no_free_ptr(res);
 	intel_vsec_dev->num_resources = header->num_entries;
 	intel_vsec_dev->quirks = info->quirks;
+	intel_vsec_dev->base_addr = info->base_addr;
 
 	if (header->id == VSEC_ID_SDSI)
 		intel_vsec_dev->ida = &intel_vsec_sdsi_ida;
diff --git a/drivers/platform/x86/intel/vsec.h b/drivers/platform/x86/intel/vsec.h
index bb8b6452df70..e23e76129691 100644
--- a/drivers/platform/x86/intel/vsec.h
+++ b/drivers/platform/x86/intel/vsec.h
@@ -73,6 +73,7 @@ struct intel_vsec_platform_info {
 	struct intel_vsec_header **headers;
 	unsigned long caps;
 	unsigned long quirks;
+	u64 base_addr;
 };
 
 struct intel_vsec_device {
@@ -85,6 +86,7 @@ struct intel_vsec_device {
 	void *priv_data;
 	size_t priv_data_size;
 	unsigned long quirks;
+	u64 base_addr;
 };
 
 int intel_vsec_add_aux(struct pci_dev *pdev, struct device *parent,
-- 
2.34.1


  parent reply	other threads:[~2023-11-23  4:04 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-23  4:03 [PATCH V5 00/20] intel_pmc: Add telemetry API to read counters David E. Box
2023-11-23  4:03 ` [PATCH V5 01/20] platform/x86/intel/vsec: Fix xa_alloc memory leak David E. Box
2023-11-23 11:27   ` Ilpo Järvinen
2023-11-23 15:27   ` Ilpo Järvinen
2023-11-23  4:03 ` [PATCH V5 02/20] platform/x86/intel/vsec: Move structures to header David E. Box
2023-11-23  4:03 ` [PATCH V5 03/20] platform/x86/intel/vsec: remove platform_info from vsec device structure David E. Box
2023-11-23  4:03 ` [PATCH V5 04/20] platform/x86/intel/vsec: Use cleanup.h David E. Box
2023-11-23  4:03 ` [PATCH V5 05/20] platform/x86/intel/vsec: Assign auxdev parent by argument David E. Box
2023-11-23 11:29   ` Ilpo Järvinen
2023-11-23  4:03 ` [PATCH V5 06/20] platform/x86/intel/vsec: Add intel_vsec_register David E. Box
2023-11-23 15:24   ` Ilpo Järvinen
2023-11-23  4:03 ` David E. Box [this message]
2023-11-23  4:03 ` [PATCH V5 08/20] platform/x86/intel/pmt: Add header to struct intel_pmt_entry David E. Box
2023-11-23  4:03 ` [PATCH V5 09/20] platform/x86/intel/pmt: telemetry: Export API to read telemetry David E. Box
2023-11-23  4:03 ` [PATCH V5 10/20] platform/x86:intel/pmc: Call pmc_get_low_power_modes from platform init David E. Box
2023-11-23  4:03 ` [PATCH V5 11/20] platform/x86/intel/pmc: Allow pmc_core_ssram_init to fail David E. Box
2023-11-23  4:03 ` [PATCH V5 12/20] asm-generic/io.h: iounmap/ioport_unmap cleanup.h support David E. Box
2023-11-23 14:30   ` Ilpo Järvinen
2023-11-23 16:23     ` David E. Box
2023-11-28  1:55     ` David E. Box
2023-11-29  8:45       ` Baoquan He
2023-12-10 15:24       ` Baoquan He
2023-11-24  9:49   ` kernel test robot
2023-11-23  4:03 ` [PATCH V5 13/20] platform/x86/intel/pmc: Cleanup SSRAM discovery David E. Box
2023-11-23 14:26   ` Ilpo Järvinen
2023-11-23  4:03 ` [PATCH V5 14/20] platform/x86/intel/pmc/mtl: Use return value from pmc_core_ssram_init() David E. Box
2023-11-23 14:26   ` Ilpo Järvinen
2023-11-23  4:03 ` [PATCH V5 15/20] platform/x86/intel/pmc: Find and register PMC telemetry entries David E. Box
2023-11-23  4:03 ` [PATCH V5 16/20] platform/x86/intel/pmc: Display LPM requirements for multiple PMCs David E. Box
2023-11-23 14:08   ` Ilpo Järvinen
2023-11-23  4:03 ` [PATCH V5 17/20] platform/x86/intel/pmc: Retrieve LPM information using Intel PMT David E. Box
2023-11-23  4:03 ` [PATCH V5 18/20] platform/x86/intel/pmc: Read low power mode requirements for MTL-M and MTL-P David E. Box
2023-11-23  4:03 ` [PATCH V5 19/20] platform/x86/intel/pmc: Add debug attribute for Die C6 counter David E. Box
2023-11-23 11:38   ` Ilpo Järvinen
2023-11-23 13:39     ` Ilpo Järvinen
2023-11-23  4:03 ` [PATCH V5 20/20] platform/x86/intel/pmc: Show Die C6 counter on Meteor Lake David E. Box

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