From: Shengyang Chen <shengyang.chen@starfivetech.com>
To: <devicetree@vger.kernel.org>, <dri-devel@lists.freedesktop.org>
Cc: <andrzej.hajda@intel.com>, <neil.armstrong@linaro.org>,
<rfoss@kernel.org>, <Laurent.pinchart@ideasonboard.com>,
<jonas@kwiboo.se>, <jernej.skrabec@gmail.com>,
<maarten.lankhorst@linux.intel.com>, <mripard@kernel.org>,
<tzimmermann@suse.de>, <airlied@gmail.com>, <daniel@ffwll.ch>,
<robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
<conor+dt@kernel.org>, <p.zabel@pengutronix.de>,
<tomi.valkeinen@ideasonboard.com>, <r-ravikumar@ti.com>,
<rdunlap@infradead.org>, <u.kleine-koenig@pengutronix.de>,
<bbrezillon@kernel.org>, <changhuang.liang@starfivetech.com>,
<keith.zhao@starfivetech.com>, <shengyang.chen@starfivetech.com>,
<jack.zhu@starfivetech.com>, <linux-kernel@vger.kernel.org>
Subject: [PATCH v1 1/2] dt-bindings: display: bridge: cdns: Add properties to support StarFive JH7110 SoC
Date: Mon, 27 Nov 2023 19:34:35 +0800 [thread overview]
Message-ID: <20231127113436.57361-2-shengyang.chen@starfivetech.com> (raw)
In-Reply-To: <20231127113436.57361-1-shengyang.chen@starfivetech.com>
From: Keith Zhao <keith.zhao@starfivetech.com>
Add properties in CDNS DSI yaml file to match with
CDNS DSI module in StarFive JH7110 SoC.
Signed-off-by: Keith Zhao <keith.zhao@starfivetech.com>
---
.../bindings/display/bridge/cdns,dsi.yaml | 38 ++++++++++++++++++-
1 file changed, 36 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,dsi.yaml b/Documentation/devicetree/bindings/display/bridge/cdns,dsi.yaml
index 23060324d16e..3f02ee383aad 100644
--- a/Documentation/devicetree/bindings/display/bridge/cdns,dsi.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/cdns,dsi.yaml
@@ -17,6 +17,7 @@ properties:
enum:
- cdns,dsi
- ti,j721e-dsi
+ - starfive,cdns-dsi
reg:
minItems: 1
@@ -27,14 +28,20 @@ properties:
Register block for wrapper settings registers in case of TI J7 SoCs.
clocks:
+ minItems: 2
items:
- description: PSM clock, used by the IP
- description: sys clock, used by the IP
+ - description: apb clock, used by the IP
+ - description: txesc clock, used by the IP
clock-names:
+ minItems: 2
items:
- const: dsi_p_clk
- const: dsi_sys_clk
+ - const: apb
+ - const: txesc
phys:
maxItems: 1
@@ -46,10 +53,21 @@ properties:
maxItems: 1
resets:
- maxItems: 1
+ minItems: 1
+ items:
+ - description: dsi sys reset line
+ - description: dsi dpi reset line
+ - description: dsi apb reset line
+ - description: dsi txesc reset line
+ - description: dsi txbytehs reset line
reset-names:
- const: dsi_p_rst
+ items:
+ - const: dsi_p_rst
+ - const: dsi_dpi
+ - const: dsi_apb
+ - const: dsi_txesc
+ - const: dsi_txbytehs
ports:
$ref: /schemas/graph.yaml#/properties/ports
@@ -90,6 +108,22 @@ allOf:
reg:
maxItems: 1
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: starfive,cdns-dsi
+ then:
+ properties:
+ clocks:
+ minItems: 4
+ maxItems: 4
+ resets:
+ minItems: 5
+ maxItems: 5
+ required:
+ - reset-names
+
required:
- compatible
- reg
--
2.17.1
next prev parent reply other threads:[~2023-11-27 11:34 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-27 11:34 [PATCH v1 0/2] Add StarFive JH7110 SoC DSI support Shengyang Chen
2023-11-27 11:34 ` Shengyang Chen [this message]
2023-11-27 12:22 ` [PATCH v1 1/2] dt-bindings: display: bridge: cdns: Add properties to support StarFive JH7110 SoC Krzysztof Kozlowski
2023-12-08 6:54 ` Shengyang Chen
2023-11-27 12:23 ` Krzysztof Kozlowski
2023-12-08 7:00 ` Shengyang Chen
2023-11-28 15:52 ` Rob Herring
2023-12-08 7:03 ` Shengyang Chen
2023-11-27 11:34 ` [PATCH v1 2/2] gpu: drm: bridge: cadence: Add a driver and platform ops for " Shengyang Chen
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