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From: Sui Jingfeng <sui.jingfeng@linux.dev>
To: Lucas Stach <l.stach@pengutronix.de>
Cc: Christian Gmeiner <christian.gmeiner@gmail.com>,
	dri-devel@lists.freedesktop.org, etnaviv@lists.freedesktop.org,
	linux-kernel@vger.kernel.org,
	Sui Jingfeng <sui.jingfeng@linux.dev>
Subject: [etnaviv-next v12 7/8] drm/etnaviv: Add support for the JingJia Macro and LingJiu PCI(e) GPUs
Date: Thu, 30 Nov 2023 06:02:30 +0800	[thread overview]
Message-ID: <20231129220231.12763-8-sui.jingfeng@linux.dev> (raw)
In-Reply-To: <20231129220231.12763-1-sui.jingfeng@linux.dev>

Tested on X86-64 with JM9100 GPU, the JM9100 discrete GPU has only one
vivante GPU found so far.

$ sudo dmesg | grep etnaviv

 etnaviv 0000:0d:00.0: enabling device (0000 -> 0003)
 etnaviv 0000:0d:00.0: Unbalanced pm_runtime_enable!
 etnaviv 0000:0d:00.0: model: GC9200, revision: 6304
 [drm] Initialized etnaviv 1.3.0 20151214 for 0000:0d:00.0 on minor 0

Signed-off-by: Sui Jingfeng <sui.jingfeng@linux.dev>
---
 drivers/gpu/drm/etnaviv/etnaviv_pci_drv.c | 112 +++++++++++++++++++++-
 1 file changed, 109 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/etnaviv/etnaviv_pci_drv.c b/drivers/gpu/drm/etnaviv/etnaviv_pci_drv.c
index 37de661844d8..b55ee6dd723e 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_pci_drv.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_pci_drv.c
@@ -6,10 +6,109 @@
 #include "etnaviv_gpu.h"
 #include "etnaviv_pci_drv.h"
 
+enum etnaviv_pci_gpu_chip_id {
+	GC_CORE_UNKNOWN = 0,
+	JM9100 = 1,
+	JD9230P = 2,
+	LINGJIU_GP102 = 3,
+	GC1000_IN_LS7A1000 = 4,
+	GC1000_IN_LS2K1000 = 5,
+	GC_CORE_PCI_LAST,
+};
+
+struct etnaviv_pci_gpu_platform_data {
+	enum etnaviv_pci_gpu_chip_id chip_id;
+	u32 num_core;
+	u32 num_vram;
+	u32 vram_bars[2];
+	u32 mmio_bar;
+	struct {
+		u32 id;
+		u32 offset;
+		u32 size;
+		char name[20];
+	} cores[ETNA_MAX_PIPES];
+
+	bool has_dedicated_vram;
+	bool no_clk;
+	bool share_irq;
+	char name[24];
+};
+
+static const struct etnaviv_pci_gpu_platform_data
+gc_core_plaform_data[GC_CORE_PCI_LAST] = {
+	{
+		.chip_id = GC_CORE_UNKNOWN,
+	},
+	{
+		.chip_id = JM9100,
+		.num_core = 1,
+		.num_vram = 2,
+		.vram_bars = {0, 2},
+		.mmio_bar = 1,
+		.cores = {{0, 0x00900000, 0x00010000, "etnaviv-gpu,3d"},},
+		.has_dedicated_vram = true,
+		.no_clk = true,
+		.share_irq = true,
+		.name = "JingJia Micro JM9100",
+	},
+	{
+		.chip_id = JD9230P,
+		.num_core = 2,
+		.num_vram = 2,
+		.vram_bars = {0, 2},
+		.mmio_bar = 1,
+		.cores = {{0, 0x00900000, 0x00010000, "etnaviv-gpu,3d"},
+			  {1, 0x00910000, 0x00010000, "etnaviv-gpu,3d"},},
+		.has_dedicated_vram = true,
+		.no_clk = true,
+		.share_irq = true,
+		.name = "JingJia Micro JD9230P",
+	},
+	{
+		.chip_id = LINGJIU_GP102,
+		.num_core = 2,
+		.num_vram = 1,
+		.vram_bars = {0,},
+		.mmio_bar = 2,
+		.cores = {{0, 0x00040000, 0x00010000, "etnaviv-gpu,3d"},
+			  {0, 0x000C0000, 0x00010000, "etnaviv-gpu,2d"},},
+		.has_dedicated_vram = true,
+		.no_clk = true,
+		.share_irq = true,
+		.name = "LingJiu GP102",
+	},
+	{
+		.chip_id = GC1000_IN_LS7A1000,
+		.num_core = 1,
+		.num_vram = 1,
+		.vram_bars = {2, 0},
+		.mmio_bar = 0,
+		.cores = {{0, 0, 0, "etnaviv-gpu,3d"}, {}, {}, {}},
+		.has_dedicated_vram = true,
+		.no_clk = true,
+		.share_irq = true,
+		.name = "GC1000 in LS7A1000",
+	},
+	{
+		.chip_id = GC1000_IN_LS2K1000,
+		.num_core = 1,
+		.num_vram = 0,
+		.mmio_bar = 0,
+		.cores = {{0, 0, 0, "etnaviv-gpu,3d"}, {}, {}, {}},
+		.has_dedicated_vram = false,
+		.no_clk = true,
+		.share_irq = true,
+		.name = "GC1000 in LS2K1000",
+	},
+};
+
 static int etnaviv_pci_probe(struct pci_dev *pdev,
 			     const struct pci_device_id *ent)
 {
+	enum etnaviv_pci_gpu_chip_id chip_id = ent->driver_data;
 	struct device *dev = &pdev->dev;
+	const struct etnaviv_pci_gpu_platform_data *pdata;
 	void __iomem *mmio;
 	int ret;
 
@@ -25,11 +124,15 @@ static int etnaviv_pci_probe(struct pci_dev *pdev,
 	if (ret)
 		return ret;
 
+	pdata = &gc_core_plaform_data[chip_id];
+
 	/* PCI bar 0 contain the MMIO registers */
-	mmio = pcim_iomap(pdev, 0, 0);
+	mmio = pcim_iomap(pdev, pdata->mmio_bar, 0);
 	if (IS_ERR(mmio))
 		return PTR_ERR(mmio);
 
+	mmio += pdata->cores[0].offset;
+
 	ret = etnaviv_gpu_driver_create(dev, mmio, pdev->irq, false, false);
 	if (ret)
 		return ret;
@@ -49,8 +152,11 @@ static void etnaviv_pci_remove(struct pci_dev *pdev)
 }
 
 static const struct pci_device_id etnaviv_pci_id_lists[] = {
-	{PCI_VDEVICE(LOONGSON, 0x7a15)},
-	{PCI_VDEVICE(LOONGSON, 0x7a05)},
+	{0x0731, 0x9100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, JM9100},
+	{0x0731, 0x9230, PCI_ANY_ID, PCI_ANY_ID, 0, 0, JD9230P},
+	{0x0709, 0x0001, PCI_ANY_ID, PCI_ANY_ID, 0, 0, LINGJIU_GP102},
+	{PCI_VDEVICE(LOONGSON, 0x7a15), GC1000_IN_LS7A1000},
+	{PCI_VDEVICE(LOONGSON, 0x7a05), GC1000_IN_LS2K1000},
 	{ }
 };
 
-- 
2.34.1


  parent reply	other threads:[~2023-11-29 22:03 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-29 22:02 [etnaviv-next v12 0/8] drm/etnaviv: Add PCI(e) device driver wrapper and instances Sui Jingfeng
2023-11-29 22:02 ` [etnaviv-next v12 1/8] drm/etnaviv: Add a helper function to get clocks Sui Jingfeng
2023-11-29 22:02 ` [etnaviv-next v12 2/8] drm/etnaviv: Add constructor and destructor for struct etnaviv_drm_private Sui Jingfeng
2023-11-29 22:02 ` [etnaviv-next v12 3/8] drm/etnaviv: Allow bypass component framework Sui Jingfeng
2023-11-29 22:02 ` [etnaviv-next v12 4/8] drm/etnaviv: Support for the vivante GPU core attached on PCI(e) device Sui Jingfeng
2023-11-29 22:02 ` [etnaviv-next v12 5/8] drm/etnaviv: Add support for cached coherent caching mode Sui Jingfeng
2023-11-29 22:02 ` [etnaviv-next v12 6/8] drm/etnaviv: Embed struct drm_device in struct etnaviv_drm_private Sui Jingfeng
2023-11-29 22:02 ` Sui Jingfeng [this message]
2023-11-29 22:02 ` [etnaviv-next v12 8/8] drm/etnaviv: Support binding multiple GPU cores with component Sui Jingfeng

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