From: Jason Gunthorpe <jgg@ziepe.ca>
To: Baolu Lu <baolu.lu@linux.intel.com>
Cc: Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
Kevin Tian <kevin.tian@intel.com>,
iommu@lists.linux.dev, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/1] iommu/vt-d: Disable PCI ATS in legacy passthrough mode
Date: Thu, 30 Nov 2023 12:18:27 -0400 [thread overview]
Message-ID: <20231130161827.GD1394392@ziepe.ca> (raw)
In-Reply-To: <8186755c-fe80-424c-9b50-06ea213b3b17@linux.intel.com>
On Thu, Nov 30, 2023 at 01:44:19PM +0800, Baolu Lu wrote:
> On 2023/11/30 4:13, Jason Gunthorpe wrote:
> > On Tue, Nov 14, 2023 at 09:10:35AM +0800, Lu Baolu wrote:
> > > When IOMMU hardware operates in legacy mode, the TT field of the context
> > > entry determines the translation type, with three supported types (Section
> > > 9.3 Context Entry):
> > >
> > > - DMA translation without device TLB support
> > > - DMA translation with device TLB support
> > > - Passthrough mode with translated and translation requests blocked
> > >
> > > Device TLB support is absent when hardware is configured in passthrough
> > > mode.
> > >
> > > Disable the PCI ATS feature when IOMMU is configured for passthrough
> > > translation type in legacy (non-scalable) mode.
> > Oh.. That is the same horrible outcome that ARM has 🙁
> >
> > The issue is what to do if the RID translation is in identity but a
> > PASID is attached that should be using ATS - eg do you completely
> > loose SVA support if the RID is set to the optimized identity mode?
>
> This fix only affects the non-scalable mode that doesn't support PASID
> features.
Ah, OK so it is OK. I'm glad the new mode supports ATS against
passthrough.
Thanks,
Jason
next prev parent reply other threads:[~2023-11-30 16:18 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-14 1:10 [PATCH 1/1] iommu/vt-d: Support enforce_cache_coherency only for empty domains Lu Baolu
2023-11-14 1:10 ` [PATCH 1/1] iommu/vt-d: Omit devTLB invalidation requests when TES=0 Lu Baolu
2023-11-14 3:14 ` Tian, Kevin
2023-11-14 3:13 ` Baolu Lu
2023-11-14 4:45 ` Tian, Kevin
2023-11-14 4:54 ` Baolu Lu
2023-11-14 5:31 ` Tian, Kevin
2023-11-29 20:10 ` Jason Gunthorpe
2023-11-30 4:06 ` Baolu Lu
2023-11-30 12:15 ` Jason Gunthorpe
2023-11-14 1:10 ` [PATCH 1/1] iommu/vt-d: Disable PCI ATS in legacy passthrough mode Lu Baolu
2023-11-14 3:14 ` Tian, Kevin
2023-11-16 7:35 ` Baolu Lu
2023-11-16 8:24 ` Tian, Kevin
2023-11-17 1:09 ` Baolu Lu
2023-11-17 2:22 ` Tian, Kevin
2023-11-29 20:13 ` Jason Gunthorpe
2023-11-30 5:44 ` Baolu Lu
2023-11-30 16:18 ` Jason Gunthorpe [this message]
2023-11-14 1:10 ` [PATCH 1/1] iommu/vt-d: Make context clearing consistent with context mapping Lu Baolu
2023-11-14 3:20 ` Tian, Kevin
2023-11-14 3:22 ` Baolu Lu
2023-11-14 4:46 ` Tian, Kevin
2023-11-14 3:16 ` [PATCH 1/1] iommu/vt-d: Support enforce_cache_coherency only for empty domains Tian, Kevin
2023-11-29 20:08 ` Jason Gunthorpe
2023-11-30 3:48 ` Baolu Lu
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