[PATCH 0/2] Allow disabling USB3 ports in xHCI/DWC3

Sam Edwards
2023-12-08T21:05:18Z

Hi USB devs,

This patchset is a semi-RFC: I haven't discussed this change yet, and it may
turn out to be a bad idea. But if there is a consensus that this change is
appropriate, these patches are the ones I'd submit for inclusion.

These patches were developed while working with a SoC (Rockchip RK3588) that
contains DWC3-OTG controllers and accompanying USB2 + USB3/DP PHYs. My target
(Turing RK1) uses its first bus in USB2.0-OTG mode only: the associated USB3
PHY is reserved for DP. Worse, a driver for the USBDP block (though it exists)
has not been merged to mainline. Without lighting up the PHY side of the PIPE,
the DWC3 behaves erratically, even for USB2 operation.

This could be addressed by patching in the (out-of-tree) USBDP driver and
enabling only its USB backend. However, I found it cleaner (also from a
user-friendliness standpoint) just to disable the unusable USB3 port. These
patches achieve that by (1) making it possible to tell the xHCI driver to
ignore any USB3 port(s), and (2) (perhaps more controversially) making the DWC3
driver disable USB3 host ports when `maximum-speed` isn't set high enough.

There are other ways to disable the USB3 ports on RK3588, such as via some
syscon registers. I figured I would start with the most general solution
(benefitting other SoCs) first, getting more specific only if necessary. :)

Thank you for your attention,
Sam

Sam Edwards (2):
xhci: Introduce "disable-usb3" DT property/quirk
usb: dwc3: host: Disable USB3 ports if maximum-speed doesn't permit
USB3

Documentation/devicetree/bindings/usb/usb-xhci.yaml | 4 ++++
drivers/usb/dwc3/host.c | 5 ++++-
drivers/usb/host/xhci-mem.c | 4 ++++
drivers/usb/host/xhci-plat.c | 3 +++
drivers/usb/host/xhci.h | 1 +
5 files changed, 16 insertions(+), 1 deletion(-)

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2.41.0