From: Lukas Wunner <lukas@wunner.de>
To: Yannic Moog <y.moog@phytec.de>
Cc: Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Shawn Guo <shawnguo@kernel.org>, Li Yang <leoyang.li@nxp.com>,
Sascha Hauer <s.hauer@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
NXP Linux Team <linux-imx@nxp.com>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, upstream@lists.phytec.de
Subject: Re: [PATCH v2 2/2] arm64: dts: freescale: add phyGATE-Tauri i.MX 8M Mini Support
Date: Wed, 20 Dec 2023 08:49:31 +0100 [thread overview]
Message-ID: <20231220074931.GA13382@wunner.de> (raw)
In-Reply-To: <20230925-tauri_upstream_support-v2-2-62a6dfc48e31@phytec.de>
On Mon, Sep 25, 2023 at 09:25:19AM +0200, Yannic Moog wrote:
> phyGATE-Tauri uses a phyCORE-i.MX8MM SoM. Add device tree for the board.
[...]
> + tpm: tpm@1 {
> + compatible = "tcg,tpm_tis-spi";
What's the chip used on this board? Going forward, the DT schema for TPMs
requires the exact chip name in addition to the generic "tcg,tpm_tis-spi".
> + interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
> + interrupt-parent = <&gpio2>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_tpm>;
> + reg = <1>;
> + spi-max-frequency = <38000000>;
> + };
> +};
next prev parent reply other threads:[~2023-12-20 7:49 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-25 7:25 [PATCH v2 0/2] Add support for the phyGATE-Tauri-L IoT Gateway Yannic Moog
2023-09-25 7:25 ` [PATCH v2 1/2] dt-bindings: arm: fsl: add phyGATE-Tauri-L board Yannic Moog
2023-09-25 7:25 ` [PATCH v2 2/2] arm64: dts: freescale: add phyGATE-Tauri i.MX 8M Mini Support Yannic Moog
2023-12-20 7:49 ` Lukas Wunner [this message]
2023-12-20 7:56 ` Yannic Moog
2023-12-20 9:21 ` Lukas Wunner
2023-10-09 13:18 ` [PATCH v2 0/2] Add support for the phyGATE-Tauri-L IoT Gateway Shawn Guo
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