Re: [PATCH 2/3] dt-bindings: tegra: pmc: Update scratch as an optional aperture

kernel test robot
2024-01-08T16:16:16Z

Hi Petlozu,

kernel test robot noticed the following build warnings:

[auto build test WARNING on tegra/for-next]
[also build test WARNING on robh/for-next linus/master v6.7 next-20240108]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url: https://github.com/intel-lab-lkp/linux/commits/Petlozu-Pravareshwar/dt-bindings-tegra-pmc-Update-scratch-as-an-optional-aperture/20240106-155615
base: https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux.git for-next
patch link: https://lore.kernel.org/r/20240106075134.3933491-2-petlozup%40nvidia.com
patch subject: [PATCH 2/3] dt-bindings: tegra: pmc: Update scratch as an optional aperture
compiler: loongarch64-linux-gcc (GCC) 13.2.0
reproduce: (https://download.01.org/0day-ci/archive/20240109/202401090058.4xtTta86-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202401090058.4xtTta86-lkp@intel.com/

dtcheck warnings: (new ones prefixed by >>)
>> Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.yaml:85:12: [warning] wrong indentation: expected 12 but found 11 (indentation)

vim +85 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.yaml

8
9 maintainers:
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12
13 properties:
14 compatible:
15 enum:
16 - nvidia,tegra186-pmc
17 - nvidia,tegra194-pmc
18 - nvidia,tegra234-pmc
19
20 reg:
21 minItems: 4
22 maxItems: 5
23
24 reg-names:
25 minItems: 4
26 maxItems: 5
27
28 interrupt-controller: true
29
30 "#interrupt-cells":
31 description: Specifies the number of cells needed to encode an
32 interrupt source. The value must be 2.
33 const: 2
34
35 nvidia,invert-interrupt:
36 description: If present, inverts the PMU interrupt signal.
37 $ref: /schemas/types.yaml#/definitions/flag
38
39 allOf:
40 - if:
41 properties:
42 compatible:
43 contains:
44 const: nvidia,tegra186-pmc
45 then:
46 properties:
47 reg:
48 maxItems: 4
49 reg-names:
50 items:
51 - const: pmc
52 - const: wake
53 - const: aotag
54 - const: scratch
55
56 - if:
57 properties:
58 compatible:
59 contains:
60 const: nvidia,tegra194-pmc
61 then:
62 properties:
63 reg:
64 minItems: 5
65 reg-names:
66 items:
67 - const: pmc
68 - const: wake
69 - const: aotag
70 - const: scratch
71 - const: misc
72
73 - if:
74 properties:
75 compatible:
76 contains:
77 const: nvidia,tegra234-pmc
78 then:
79 properties:
80 reg:
81 minItems: 4
82 maxItems: 5
83 reg-names:
84 anyOf:
> 85 - items:
86 - const: pmc
87 - const: wake
88 - const: aotag
89 - const: misc
90 - items:
91 - const: pmc
92 - const: wake
93 - const: aotag
94 - const: scratch
95 - const: misc
96
97 patternProperties:
98 "^[a-z0-9]+-[a-z0-9]+$":
99 if:
100 type: object
101 then:
102 description: |
103 These are pad configuration nodes. On Tegra SoCs a pad is a set of
104 pins which are configured as a group. The pin grouping is a fixed
105 attribute of the hardware. The PMC can be used to set pad power
106 state and signaling voltage. A pad can be either in active or
107 power down mode. The support for power state and signaling voltage
108 configuration varies depending on the pad in question. 3.3 V and
109 1.8 V signaling voltages are supported on pins where software
110 controllable signaling voltage switching is available.
111
112 Pad configurations are described with pin configuration nodes
113 which are placed under the pmc node and they are referred to by
114 the pinctrl client properties. For more information see
115
116 Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
117
118 The following pads are present on Tegra186:
119
120 csia, csib, dsi, mipi-bias, pex-clk-bias, pex-clk3, pex-clk2,
121 pex-clk1, usb0, usb1, usb2, usb-bias, uart, audio, hsic, dbg,
122 hdmi-dp0, hdmi-dp1, pex-cntrl, sdmmc2-hv, sdmmc4, cam, dsib,
123 dsic, dsid, csic, csid, csie, dsif, spi, ufs, dmic-hv, edp,
124 sdmmc1-hv, sdmmc3-hv, conn, audio-hv, ao-hv
125
126 The following pads are present on Tegra194:
127
128 csia, csib, mipi-bias, pex-clk-bias, pex-clk3, pex-clk2,
129 pex-clk1, eqos, pex-clk-2-bias, pex-clk-2, dap3, dap5, uart,
130 pwr-ctl, soc-gpio53, audio, gp-pwm2, gp-pwm3, soc-gpio12,
131 soc-gpio13, soc-gpio10, uart4, uart5, dbg, hdmi-dp3, hdmi-dp2,
132 hdmi-dp0, hdmi-dp1, pex-cntrl, pex-ctl2, pex-l0-rst,
133 pex-l1-rst, sdmmc4, pex-l5-rst, cam, csic, csid, csie, csif,
134 spi, ufs, csig, csih, edp, sdmmc1-hv, sdmmc3-hv, conn,
135 audio-hv, ao-hv
136
137 properties:
138 pins:
139 $ref: /schemas/types.yaml#/definitions/string
140 description: Must contain the name of the pad(s) to be
141 configured.
142
143 low-power-enable:
144 description: Configure the pad into power down mode.
145 $ref: /schemas/types.yaml#/definitions/flag
146
147 low-power-disable:
148 description: Configure the pad into active mode.
149 $ref: /schemas/types.yaml#/definitions/flag
150
151 power-source:
152 $ref: /schemas/types.yaml#/definitions/uint32
153 description: |
154 Must contain either TEGRA_IO_PAD_VOLTAGE_1V8 or
155 TEGRA_IO_PAD_VOLTAGE_3V3 to select between signalling
156 voltages.
157
158 The values are defined in
159
160 include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h
161
162 The power state can be configured on all of the above pads
163 except for ao-hv. Following pads have software configurable
164 signaling voltages: sdmmc2-hv, dmic-hv, sdmmc1-hv, sdmmc3-hv,
165 audio-hv, ao-hv.
166
167 phandle: true
168
169 required:
170 - pins
171
172 additionalProperties: false
173
174 required:
175 - compatible
176 - reg
177 - reg-names
178

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