* [PATCH 0/2] Add Phytec i.MX93 Segin support @ 2024-01-16 11:39 Mathieu Othacehe 2024-01-16 11:39 ` [PATCH 1/2] dt-bindings: arm: fsl: Add i.MX93 PHYTEC with Segin Mathieu Othacehe 2024-01-16 11:39 ` [PATCH 2/2] arm64: dts: imx93-phycore-segin: Add Phytec i.MX93 Segin Mathieu Othacehe 0 siblings, 2 replies; 6+ messages in thread From: Mathieu Othacehe @ 2024-01-16 11:39 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team, Li Yang, Stefan Wahren Cc: devicetree, linux-kernel, linux-arm-kernel, Mathieu Othacehe Hello, This adds support for the Phytec i.MX93 Segin board. Thanks, Mathieu Mathieu Othacehe (2): dt-bindings: arm: fsl: Add i.MX93 PHYTEC with Segin arm64: dts: imx93-phycore-segin: Add Phytec i.MX93 Segin .../devicetree/bindings/arm/fsl.yaml | 6 ++ arch/arm64/boot/dts/freescale/Makefile | 1 + .../dts/freescale/imx93-phycore-segin.dts | 92 +++++++++++++++++++ .../boot/dts/freescale/imx93-phycore-som.dtsi | 54 +++++++++++ 4 files changed, 153 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx93-phycore-segin.dts create mode 100644 arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi -- 2.41.0 ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 1/2] dt-bindings: arm: fsl: Add i.MX93 PHYTEC with Segin 2024-01-16 11:39 [PATCH 0/2] Add Phytec i.MX93 Segin support Mathieu Othacehe @ 2024-01-16 11:39 ` Mathieu Othacehe 2024-01-16 12:16 ` Krzysztof Kozlowski 2024-01-16 11:39 ` [PATCH 2/2] arm64: dts: imx93-phycore-segin: Add Phytec i.MX93 Segin Mathieu Othacehe 1 sibling, 1 reply; 6+ messages in thread From: Mathieu Othacehe @ 2024-01-16 11:39 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team, Li Yang, Stefan Wahren Cc: devicetree, linux-kernel, linux-arm-kernel, Mathieu Othacehe Add support for i.MX93 PHYTEC with Segin board. Signed-off-by: Mathieu Othacehe <othacehe@gnu.org> --- Documentation/devicetree/bindings/arm/fsl.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 228dcc5c7d6f..196935d3abf0 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1275,6 +1275,12 @@ properties: - const: tq,imx93-tqma9352 # TQ-Systems GmbH i.MX93 TQMa93xxCA/LA SOM - const: fsl,imx93 + - description: i.MX93 PHYTEC phyBOARD-Segin + items: + - const: phytec,imx93-phycore-segin + - const: phytec,imx93-phycore-som + - const: fsl,imx93 + - description: Freescale Vybrid Platform Device Tree Bindings -- 2.41.0 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] dt-bindings: arm: fsl: Add i.MX93 PHYTEC with Segin 2024-01-16 11:39 ` [PATCH 1/2] dt-bindings: arm: fsl: Add i.MX93 PHYTEC with Segin Mathieu Othacehe @ 2024-01-16 12:16 ` Krzysztof Kozlowski 0 siblings, 0 replies; 6+ messages in thread From: Krzysztof Kozlowski @ 2024-01-16 12:16 UTC (permalink / raw) To: Mathieu Othacehe, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team, Li Yang, Stefan Wahren Cc: devicetree, linux-kernel, linux-arm-kernel On 16/01/2024 12:39, Mathieu Othacehe wrote: > Add support for i.MX93 PHYTEC with Segin board. > > Signed-off-by: Mathieu Othacehe <othacehe@gnu.org> > --- > Documentation/devicetree/bindings/arm/fsl.yaml | 6 ++++++ > 1 file changed, 6 insertions(+) Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 2/2] arm64: dts: imx93-phycore-segin: Add Phytec i.MX93 Segin 2024-01-16 11:39 [PATCH 0/2] Add Phytec i.MX93 Segin support Mathieu Othacehe 2024-01-16 11:39 ` [PATCH 1/2] dt-bindings: arm: fsl: Add i.MX93 PHYTEC with Segin Mathieu Othacehe @ 2024-01-16 11:39 ` Mathieu Othacehe 2024-01-16 14:07 ` Fabio Estevam 2024-01-17 7:00 ` Wadim Egorov 1 sibling, 2 replies; 6+ messages in thread From: Mathieu Othacehe @ 2024-01-16 11:39 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team, Li Yang, Stefan Wahren Cc: devicetree, linux-kernel, linux-arm-kernel, Mathieu Othacehe Add DTSI for Phytec i.MX93 System on Module and DTS for Phytec i.MX93 on Segin evaluation board. This version comes with: - 1GB LPDDR4 RAM - external SD - debug UART - 1x 100Mbit Ethernet Signed-off-by: Mathieu Othacehe <othacehe@gnu.org> --- arch/arm64/boot/dts/freescale/Makefile | 1 + .../dts/freescale/imx93-phycore-segin.dts | 93 +++++++++++++++++++ .../boot/dts/freescale/imx93-phycore-som.dtsi | 51 ++++++++++ 3 files changed, 145 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx93-phycore-segin.dts create mode 100644 arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index 2e027675d7bb..6cb6d9f8783e 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -203,6 +203,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8ulp-evk.dtb dtb-$(CONFIG_ARCH_MXC) += imx93-11x11-evk.dtb dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxca.dtb dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxla.dtb +dtb-$(CONFIG_ARCH_MXC) += imx93-phycore-segin.dtb imx8mm-venice-gw72xx-0x-imx219-dtbs := imx8mm-venice-gw72xx-0x.dtb imx8mm-venice-gw72xx-0x-imx219.dtbo imx8mm-venice-gw72xx-0x-rpidsi-dtbs := imx8mm-venice-gw72xx-0x.dtb imx8mm-venice-gw72xx-0x-rpidsi.dtbo diff --git a/arch/arm64/boot/dts/freescale/imx93-phycore-segin.dts b/arch/arm64/boot/dts/freescale/imx93-phycore-segin.dts new file mode 100644 index 000000000000..2277d97fc3c4 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx93-phycore-segin.dts @@ -0,0 +1,93 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2023 PHYTEC Messtechnik GmbH + * Christoph Stoidner <c.stoidner@phytec.de> + * Copyright (C) 2024 Mathieu Othacehe <m.othacehe@gmail.com> + * + */ +/dts-v1/; + +#include "imx93-phycore-som.dtsi" + +/{ + model = "PHYTEC phyBOARD-Segin-i.MX93"; + compatible = "phytec,imx93-phycore-segin", + "phytec,imx93-phycore-som", "fsl,imx93"; + + chosen { + stdout-path = &lpuart1; + }; + + reg_usdhc2_vmmc: regulator-usdhc2 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; + regulator-name = "VSD_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +/* Console */ +&lpuart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +/* SD-Card */ +&usdhc2 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; + pinctrl-1 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; + pinctrl-2 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; + cd-gpios = <&gpio3 00 GPIO_ACTIVE_LOW>; + vmmc-supply = <®_usdhc2_vmmc>; + bus-width = <4>; + status = "okay"; + no-sdio; + no-mmc; +}; + +/* Watchdog */ +&wdog3 { + status = "okay"; +}; + +&iomuxc { + pinctrl-names = "default"; + status = "okay"; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX93_PAD_UART1_RXD__LPUART1_RX 0x31e + MX93_PAD_UART1_TXD__LPUART1_TX 0x31e + >; + }; + + pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { + fsl,pins = < + MX93_PAD_SD2_RESET_B__GPIO3_IO07 0x31e + >; + }; + + pinctrl_usdhc2_gpio: usdhc2gpiogrp { + fsl,pins = < + MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX93_PAD_SD2_CLK__USDHC2_CLK 0x178e + MX93_PAD_SD2_CMD__USDHC2_CMD 0x139e + MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x138e + MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x138e + MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x138e + MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x139e + MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e + >; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi new file mode 100644 index 000000000000..7a9ff998a342 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi @@ -0,0 +1,51 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2023 PHYTEC Messtechnik GmbH + * Christoph Stoidner <c.stoidner@phytec.de> + * Copyright (C) 2024 Mathieu Othacehe <m.othacehe@gmail.com> + * + */ +/dts-v1/; + +#include "imx93.dtsi" + +/{ + model = "PHYTEC phyCORE-i.MX93"; + compatible = "phytec,imx93-phycore-som", "fsl,imx93"; + + reserved-memory { + ranges; + #address-cells = <2>; + #size-cells = <2>; + }; +}; + +/* eMMC */ +&usdhc1 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc1>; + pinctrl-1 = <&pinctrl_usdhc1>; + pinctrl-2 = <&pinctrl_usdhc1>; + bus-width = <8>; + non-removable; + status = "okay"; +}; + +&iomuxc { + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX93_PAD_SD1_CLK__USDHC1_CLK 0x15fe + MX93_PAD_SD1_CMD__USDHC1_CMD 0x13fe + MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x13fe + MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x13fe + MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x13fe + MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x13fe + MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x13fe + MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x13fe + MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x13fe + MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x13fe + MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x15fe + >; + }; + +}; -- 2.41.0 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] arm64: dts: imx93-phycore-segin: Add Phytec i.MX93 Segin 2024-01-16 11:39 ` [PATCH 2/2] arm64: dts: imx93-phycore-segin: Add Phytec i.MX93 Segin Mathieu Othacehe @ 2024-01-16 14:07 ` Fabio Estevam 2024-01-17 7:00 ` Wadim Egorov 1 sibling, 0 replies; 6+ messages in thread From: Fabio Estevam @ 2024-01-16 14:07 UTC (permalink / raw) To: Mathieu Othacehe Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, NXP Linux Team, Li Yang, Stefan Wahren, devicetree, linux-kernel, linux-arm-kernel On Tue, Jan 16, 2024 at 8:39 AM Mathieu Othacehe <othacehe@gnu.org> wrote: > diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile > index 2e027675d7bb..6cb6d9f8783e 100644 > --- a/arch/arm64/boot/dts/freescale/Makefile > +++ b/arch/arm64/boot/dts/freescale/Makefile > @@ -203,6 +203,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8ulp-evk.dtb > dtb-$(CONFIG_ARCH_MXC) += imx93-11x11-evk.dtb > dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxca.dtb > dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxla.dtb > +dtb-$(CONFIG_ARCH_MXC) += imx93-phycore-segin.dtb Please keep this in alphabetical order. > +#include "imx93-phycore-som.dtsi" > + > +/{ > + model = "PHYTEC phyBOARD-Segin-i.MX93"; > + compatible = "phytec,imx93-phycore-segin", > + "phytec,imx93-phycore-som", "fsl,imx93"; Can't the compatible be in a single line? > + model = "PHYTEC phyCORE-i.MX93"; > + compatible = "phytec,imx93-phycore-som", "fsl,imx93"; > + > + reserved-memory { > + ranges; > + #address-cells = <2>; > + #size-cells = <2>; Is this needed? > +&iomuxc { > + pinctrl_usdhc1: usdhc1grp { > + fsl,pins = < > + MX93_PAD_SD1_CLK__USDHC1_CLK 0x15fe > + MX93_PAD_SD1_CMD__USDHC1_CMD 0x13fe > + MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x13fe > + MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x13fe > + MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x13fe > + MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x13fe > + MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x13fe > + MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x13fe > + MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x13fe > + MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x13fe > + MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x15fe > + >; > + }; > + Please remove this blank line. > +}; ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] arm64: dts: imx93-phycore-segin: Add Phytec i.MX93 Segin 2024-01-16 11:39 ` [PATCH 2/2] arm64: dts: imx93-phycore-segin: Add Phytec i.MX93 Segin Mathieu Othacehe 2024-01-16 14:07 ` Fabio Estevam @ 2024-01-17 7:00 ` Wadim Egorov 1 sibling, 0 replies; 6+ messages in thread From: Wadim Egorov @ 2024-01-17 7:00 UTC (permalink / raw) To: Mathieu Othacehe, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team, Li Yang, Stefan Wahren Cc: devicetree, linux-kernel, linux-arm-kernel, Christoph Stoidner, upstream Hi, would be nice if you could include the author to CC. CC'ing Christoph. Regards, Wadim Am 16.01.24 um 12:39 schrieb Mathieu Othacehe: > Add DTSI for Phytec i.MX93 System on Module and DTS for Phytec > i.MX93 on Segin evaluation board. > > This version comes with: > - 1GB LPDDR4 RAM > - external SD > - debug UART > - 1x 100Mbit Ethernet > > Signed-off-by: Mathieu Othacehe <othacehe@gnu.org> > --- > arch/arm64/boot/dts/freescale/Makefile | 1 + > .../dts/freescale/imx93-phycore-segin.dts | 93 +++++++++++++++++++ > .../boot/dts/freescale/imx93-phycore-som.dtsi | 51 ++++++++++ > 3 files changed, 145 insertions(+) > create mode 100644 arch/arm64/boot/dts/freescale/imx93-phycore-segin.dts > create mode 100644 arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi > > diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile > index 2e027675d7bb..6cb6d9f8783e 100644 > --- a/arch/arm64/boot/dts/freescale/Makefile > +++ b/arch/arm64/boot/dts/freescale/Makefile > @@ -203,6 +203,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8ulp-evk.dtb > dtb-$(CONFIG_ARCH_MXC) += imx93-11x11-evk.dtb > dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxca.dtb > dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxla.dtb > +dtb-$(CONFIG_ARCH_MXC) += imx93-phycore-segin.dtb > > imx8mm-venice-gw72xx-0x-imx219-dtbs := imx8mm-venice-gw72xx-0x.dtb imx8mm-venice-gw72xx-0x-imx219.dtbo > imx8mm-venice-gw72xx-0x-rpidsi-dtbs := imx8mm-venice-gw72xx-0x.dtb imx8mm-venice-gw72xx-0x-rpidsi.dtbo > diff --git a/arch/arm64/boot/dts/freescale/imx93-phycore-segin.dts b/arch/arm64/boot/dts/freescale/imx93-phycore-segin.dts > new file mode 100644 > index 000000000000..2277d97fc3c4 > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx93-phycore-segin.dts > @@ -0,0 +1,93 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (C) 2023 PHYTEC Messtechnik GmbH > + * Christoph Stoidner <c.stoidner@phytec.de> > + * Copyright (C) 2024 Mathieu Othacehe <m.othacehe@gmail.com> > + * > + */ > +/dts-v1/; > + > +#include "imx93-phycore-som.dtsi" > + > +/{ > + model = "PHYTEC phyBOARD-Segin-i.MX93"; > + compatible = "phytec,imx93-phycore-segin", > + "phytec,imx93-phycore-som", "fsl,imx93"; > + > + chosen { > + stdout-path = &lpuart1; > + }; > + > + reg_usdhc2_vmmc: regulator-usdhc2 { > + compatible = "regulator-fixed"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; > + regulator-name = "VSD_3V3"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>; > + enable-active-high; > + }; > +}; > + > +/* Console */ > +&lpuart1 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_uart1>; > + status = "okay"; > +}; > + > +/* SD-Card */ > +&usdhc2 { > + pinctrl-names = "default", "state_100mhz", "state_200mhz"; > + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; > + pinctrl-1 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; > + pinctrl-2 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; > + cd-gpios = <&gpio3 00 GPIO_ACTIVE_LOW>; > + vmmc-supply = <®_usdhc2_vmmc>; > + bus-width = <4>; > + status = "okay"; > + no-sdio; > + no-mmc; > +}; > + > +/* Watchdog */ > +&wdog3 { > + status = "okay"; > +}; > + > +&iomuxc { > + pinctrl-names = "default"; > + status = "okay"; > + > + pinctrl_uart1: uart1grp { > + fsl,pins = < > + MX93_PAD_UART1_RXD__LPUART1_RX 0x31e > + MX93_PAD_UART1_TXD__LPUART1_TX 0x31e > + >; > + }; > + > + pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { > + fsl,pins = < > + MX93_PAD_SD2_RESET_B__GPIO3_IO07 0x31e > + >; > + }; > + > + pinctrl_usdhc2_gpio: usdhc2gpiogrp { > + fsl,pins = < > + MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e > + >; > + }; > + > + pinctrl_usdhc2: usdhc2grp { > + fsl,pins = < > + MX93_PAD_SD2_CLK__USDHC2_CLK 0x178e > + MX93_PAD_SD2_CMD__USDHC2_CMD 0x139e > + MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x138e > + MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x138e > + MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x138e > + MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x139e > + MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e > + >; > + }; > +}; > diff --git a/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi > new file mode 100644 > index 000000000000..7a9ff998a342 > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi > @@ -0,0 +1,51 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (C) 2023 PHYTEC Messtechnik GmbH > + * Christoph Stoidner <c.stoidner@phytec.de> > + * Copyright (C) 2024 Mathieu Othacehe <m.othacehe@gmail.com> > + * > + */ > +/dts-v1/; > + > +#include "imx93.dtsi" > + > +/{ > + model = "PHYTEC phyCORE-i.MX93"; > + compatible = "phytec,imx93-phycore-som", "fsl,imx93"; > + > + reserved-memory { > + ranges; > + #address-cells = <2>; > + #size-cells = <2>; > + }; > +}; > + > +/* eMMC */ > +&usdhc1 { > + pinctrl-names = "default", "state_100mhz", "state_200mhz"; > + pinctrl-0 = <&pinctrl_usdhc1>; > + pinctrl-1 = <&pinctrl_usdhc1>; > + pinctrl-2 = <&pinctrl_usdhc1>; > + bus-width = <8>; > + non-removable; > + status = "okay"; > +}; > + > +&iomuxc { > + pinctrl_usdhc1: usdhc1grp { > + fsl,pins = < > + MX93_PAD_SD1_CLK__USDHC1_CLK 0x15fe > + MX93_PAD_SD1_CMD__USDHC1_CMD 0x13fe > + MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x13fe > + MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x13fe > + MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x13fe > + MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x13fe > + MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x13fe > + MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x13fe > + MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x13fe > + MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x13fe > + MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x15fe > + >; > + }; > + > +}; ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2024-01-17 7:00 UTC | newest] Thread overview: 6+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2024-01-16 11:39 [PATCH 0/2] Add Phytec i.MX93 Segin support Mathieu Othacehe 2024-01-16 11:39 ` [PATCH 1/2] dt-bindings: arm: fsl: Add i.MX93 PHYTEC with Segin Mathieu Othacehe 2024-01-16 12:16 ` Krzysztof Kozlowski 2024-01-16 11:39 ` [PATCH 2/2] arm64: dts: imx93-phycore-segin: Add Phytec i.MX93 Segin Mathieu Othacehe 2024-01-16 14:07 ` Fabio Estevam 2024-01-17 7:00 ` Wadim Egorov
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