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From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: x86@kernel.org, Tom Lendacky <thomas.lendacky@amd.com>,
	Andrew Cooper <andrew.cooper3@citrix.com>,
	Arjan van de Ven <arjan@linux.intel.com>,
	Huang Rui <ray.huang@amd.com>, Juergen Gross <jgross@suse.com>,
	Dimitri Sivanich <dimitri.sivanich@hpe.com>,
	Sohil Mehta <sohil.mehta@intel.com>,
	K Prateek Nayak <kprateek.nayak@amd.com>,
	Kan Liang <kan.liang@linux.intel.com>,
	Zhang Rui <rui.zhang@intel.com>,
	"Paul E. McKenney" <paulmck@kernel.org>,
	Feng Tang <feng.tang@intel.com>,
	Andy Shevchenko <andy@infradead.org>,
	Michael Kelley <mhklinux@outlook.com>,
	"Peter Zijlstra (Intel)" <peterz@infradead.org>
Subject: [patch v5 15/19] x86/cpu: Remove topology.c
Date: Tue, 23 Jan 2024 13:53:53 +0100 (CET)	[thread overview]
Message-ID: <20240117115909.273485469@linutronix.de> (raw)
In-Reply-To: 20240117115752.863482697@linutronix.de

From: Thomas Gleixner <tglx@linutronix.de>

No more users. Stick it into the ugly code museum.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Juergen Gross <jgross@suse.com>
Tested-by: Sohil Mehta <sohil.mehta@intel.com>
Tested-by: Michael Kelley <mhklinux@outlook.com>


---
 arch/x86/kernel/cpu/Makefile   |    2 
 arch/x86/kernel/cpu/topology.c |  164 -----------------------------------------
 2 files changed, 1 insertion(+), 165 deletions(-)
 delete mode 100644 arch/x86/kernel/cpu/topology.c
---
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -18,7 +18,7 @@ KMSAN_SANITIZE_common.o := n
 KCSAN_SANITIZE_common.o := n
 
 obj-y			:= cacheinfo.o scattered.o
-obj-y			+= topology_common.o topology_ext.o topology_amd.o topology.o
+obj-y			+= topology_common.o topology_ext.o topology_amd.o
 obj-y			+= common.o
 obj-y			+= rdrand.o
 obj-y			+= match.o
--- a/arch/x86/kernel/cpu/topology.c
+++ /dev/null
@@ -1,164 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Check for extended topology enumeration cpuid leaf 0xb and if it
- * exists, use it for populating initial_apicid and cpu topology
- * detection.
- */
-
-#include <linux/cpu.h>
-#include <asm/apic.h>
-#include <asm/memtype.h>
-#include <asm/processor.h>
-
-#include "cpu.h"
-
-/* leaf 0xb SMT level */
-#define SMT_LEVEL	0
-
-/* extended topology sub-leaf types */
-#define INVALID_TYPE	0
-#define SMT_TYPE	1
-#define CORE_TYPE	2
-#define DIE_TYPE	5
-
-#define LEAFB_SUBTYPE(ecx)		(((ecx) >> 8) & 0xff)
-#define BITS_SHIFT_NEXT_LEVEL(eax)	((eax) & 0x1f)
-#define LEVEL_MAX_SIBLINGS(ebx)		((ebx) & 0xffff)
-
-#ifdef CONFIG_SMP
-/*
- * Check if given CPUID extended topology "leaf" is implemented
- */
-static int check_extended_topology_leaf(int leaf)
-{
-	unsigned int eax, ebx, ecx, edx;
-
-	cpuid_count(leaf, SMT_LEVEL, &eax, &ebx, &ecx, &edx);
-
-	if (ebx == 0 || (LEAFB_SUBTYPE(ecx) != SMT_TYPE))
-		return -1;
-
-	return 0;
-}
-/*
- * Return best CPUID Extended Topology Leaf supported
- */
-static int detect_extended_topology_leaf(struct cpuinfo_x86 *c)
-{
-	if (c->cpuid_level >= 0x1f) {
-		if (check_extended_topology_leaf(0x1f) == 0)
-			return 0x1f;
-	}
-
-	if (c->cpuid_level >= 0xb) {
-		if (check_extended_topology_leaf(0xb) == 0)
-			return 0xb;
-	}
-
-	return -1;
-}
-#endif
-
-int detect_extended_topology_early(struct cpuinfo_x86 *c)
-{
-#ifdef CONFIG_SMP
-	unsigned int eax, ebx, ecx, edx;
-	int leaf;
-
-	leaf = detect_extended_topology_leaf(c);
-	if (leaf < 0)
-		return -1;
-
-	set_cpu_cap(c, X86_FEATURE_XTOPOLOGY);
-
-	cpuid_count(leaf, SMT_LEVEL, &eax, &ebx, &ecx, &edx);
-	/*
-	 * initial apic id, which also represents 32-bit extended x2apic id.
-	 */
-	c->topo.initial_apicid = edx;
-	smp_num_siblings = max_t(int, smp_num_siblings, LEVEL_MAX_SIBLINGS(ebx));
-#endif
-	return 0;
-}
-
-/*
- * Check for extended topology enumeration cpuid leaf, and if it
- * exists, use it for populating initial_apicid and cpu topology
- * detection.
- */
-int detect_extended_topology(struct cpuinfo_x86 *c)
-{
-#ifdef CONFIG_SMP
-	unsigned int eax, ebx, ecx, edx, sub_index;
-	unsigned int ht_mask_width, core_plus_mask_width, die_plus_mask_width;
-	unsigned int core_select_mask, core_level_siblings;
-	unsigned int die_select_mask, die_level_siblings;
-	unsigned int pkg_mask_width;
-	bool die_level_present = false;
-	int leaf;
-
-	leaf = detect_extended_topology_leaf(c);
-	if (leaf < 0)
-		return -1;
-
-	/*
-	 * Populate HT related information from sub-leaf level 0.
-	 */
-	cpuid_count(leaf, SMT_LEVEL, &eax, &ebx, &ecx, &edx);
-	c->topo.initial_apicid = edx;
-	core_level_siblings = LEVEL_MAX_SIBLINGS(ebx);
-	smp_num_siblings = max_t(int, smp_num_siblings, LEVEL_MAX_SIBLINGS(ebx));
-	core_plus_mask_width = ht_mask_width = BITS_SHIFT_NEXT_LEVEL(eax);
-	die_level_siblings = LEVEL_MAX_SIBLINGS(ebx);
-	pkg_mask_width = die_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax);
-
-	sub_index = 1;
-	while (true) {
-		cpuid_count(leaf, sub_index, &eax, &ebx, &ecx, &edx);
-
-		/*
-		 * Check for the Core type in the implemented sub leaves.
-		 */
-		if (LEAFB_SUBTYPE(ecx) == CORE_TYPE) {
-			core_level_siblings = LEVEL_MAX_SIBLINGS(ebx);
-			core_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax);
-			die_level_siblings = core_level_siblings;
-			die_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax);
-		}
-		if (LEAFB_SUBTYPE(ecx) == DIE_TYPE) {
-			die_level_present = true;
-			die_level_siblings = LEVEL_MAX_SIBLINGS(ebx);
-			die_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax);
-		}
-
-		if (LEAFB_SUBTYPE(ecx) != INVALID_TYPE)
-			pkg_mask_width = BITS_SHIFT_NEXT_LEVEL(eax);
-		else
-			break;
-
-		sub_index++;
-	}
-
-	core_select_mask = (~(-1 << pkg_mask_width)) >> ht_mask_width;
-	die_select_mask = (~(-1 << die_plus_mask_width)) >>
-				core_plus_mask_width;
-
-	c->topo.core_id = apic->phys_pkg_id(c->topo.initial_apicid,
-				ht_mask_width) & core_select_mask;
-
-	if (die_level_present) {
-		c->topo.die_id = apic->phys_pkg_id(c->topo.initial_apicid,
-					core_plus_mask_width) & die_select_mask;
-	}
-
-	c->topo.pkg_id = apic->phys_pkg_id(c->topo.initial_apicid, pkg_mask_width);
-	/*
-	 * Reinit the apicid, now that we have extended initial_apicid.
-	 */
-	c->topo.apicid = apic->phys_pkg_id(c->topo.initial_apicid, 0);
-
-	c->x86_max_cores = (core_level_siblings / smp_num_siblings);
-	__max_die_per_package = (die_level_siblings / core_level_siblings);
-#endif
-	return 0;
-}


  parent reply	other threads:[~2024-01-23 12:53 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-23 12:53 [patch v5 00/19] x86/cpu: Rework topology evaluation Thomas Gleixner
2024-01-23 12:53 ` [patch v5 01/19] x86/cpu: Provide cpuid_read() et al Thomas Gleixner
2024-01-24 12:25   ` Borislav Petkov
2024-01-24 20:02     ` Borislav Petkov
2024-02-12 13:57       ` Thomas Gleixner
2024-01-23 12:53 ` [patch v5 02/19] x86/cpu: Provide cpu_init/parse_topology() Thomas Gleixner
2024-02-01 22:16   ` Sohil Mehta
2024-01-23 12:53 ` [patch v5 03/19] x86/cpu: Add legacy topology parser Thomas Gleixner
2024-01-24 20:12   ` Borislav Petkov
2024-01-23 12:53 ` [patch v5 04/19] x86/cpu: Use common topology code for Centaur and Zhaoxin Thomas Gleixner
2024-01-30 19:09   ` Borislav Petkov
2024-01-23 12:53 ` [patch v5 05/19] x86/cpu: Move __max_die_per_package to common.c Thomas Gleixner
2024-01-23 12:53 ` [patch v5 06/19] x86/cpu: Provide a sane leaf 0xb/0x1f parser Thomas Gleixner
2024-01-30 19:31   ` Borislav Petkov
2024-02-12 14:17     ` Thomas Gleixner
2024-02-12 15:00       ` Borislav Petkov
2024-02-12 15:08         ` Thomas Gleixner
2024-02-12 15:43           ` Borislav Petkov
2024-02-12 23:02             ` Thomas Gleixner
2024-02-12 15:03       ` Thomas Gleixner
2024-02-12 15:05         ` Borislav Petkov
2024-02-13 14:30     ` [tip: x86/misc] Documentation/maintainer-tip: Add C++ tail comments exception tip-bot2 for Borislav Petkov (AMD)
2024-01-23 12:53 ` [patch v5 07/19] x86/cpu: Use common topology code for Intel Thomas Gleixner
2024-02-01 15:07   ` Borislav Petkov
2024-01-23 12:53 ` [patch v5 08/19] x86/cpu/amd: Provide a separate accessor for Node ID Thomas Gleixner
2024-02-01 15:19   ` Borislav Petkov
2024-01-23 12:53 ` [patch v5 09/19] x86/cpu: Provide an AMD/HYGON specific topology parser Thomas Gleixner
2024-02-01 15:55   ` Borislav Petkov
2024-02-02 12:30   ` Borislav Petkov
2024-01-23 12:53 ` [patch v5 10/19] x86/smpboot: Teach it about topo.amd_node_id Thomas Gleixner
2024-02-06 15:48   ` Borislav Petkov
2024-01-23 12:53 ` [patch v5 11/19] x86/cpu: Use common topology code for AMD Thomas Gleixner
2024-02-06 15:58   ` Borislav Petkov
2024-02-12 14:50     ` Thomas Gleixner
2024-02-12 15:06       ` Borislav Petkov
2024-01-23 12:53 ` [patch v5 12/19] x86/cpu: Use common topology code for HYGON Thomas Gleixner
2024-01-23 12:53 ` [patch v5 13/19] x86/mm/numa: Use core domain size on AMD Thomas Gleixner
2024-02-12 15:56   ` Borislav Petkov
2024-01-23 12:53 ` [patch v5 14/19] x86/cpu: Make topology_amd_node_id() use the actual node info Thomas Gleixner
2024-01-23 12:53 ` Thomas Gleixner [this message]
2024-01-23 12:53 ` [patch v5 16/19] x86/cpu: Remove x86_coreid_bits Thomas Gleixner
2024-01-23 12:53 ` [patch v5 17/19] x86/apic: Remove unused phys_pkg_id() callback Thomas Gleixner
2024-01-23 12:53 ` [patch v5 18/19] x86/xen/smp_pv: Remove cpudata fiddling Thomas Gleixner
2024-01-23 12:53 ` [patch v5 19/19] x86/apic/uv: Remove the private leaf 0xb parser Thomas Gleixner
2024-01-31  7:40 ` [patch v5 00/19] x86/cpu: Rework topology evaluation Zhang, Rui

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