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From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: x86@kernel.org, Tom Lendacky <thomas.lendacky@amd.com>,
	Andrew Cooper <andrew.cooper3@citrix.com>,
	Arjan van de Ven <arjan@linux.intel.com>,
	Huang Rui <ray.huang@amd.com>, Juergen Gross <jgross@suse.com>,
	Dimitri Sivanich <dimitri.sivanich@hpe.com>,
	Sohil Mehta <sohil.mehta@intel.com>,
	K Prateek Nayak <kprateek.nayak@amd.com>,
	Kan Liang <kan.liang@linux.intel.com>,
	Zhang Rui <rui.zhang@intel.com>,
	"Paul E. McKenney" <paulmck@kernel.org>,
	Feng Tang <feng.tang@intel.com>,
	Andy Shevchenko <andy@infradead.org>,
	Michael Kelley <mhklinux@outlook.com>,
	"Peter Zijlstra (Intel)" <peterz@infradead.org>
Subject: [patch v2 11/30] x86/cpu/topology: Use a data structure for topology info
Date: Tue, 23 Jan 2024 14:11:07 +0100 (CET)	[thread overview]
Message-ID: <20240118123649.174566214@linutronix.de> (raw)
In-Reply-To: 20240118123127.055361964@linutronix.de

From: Thomas Gleixner <tglx@linutronix.de>

Put the processor accounting into a data structure, which will gain more
topology related information in the next steps, and sanitize the accounting.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

---
 arch/x86/kernel/cpu/topology.c |   59 ++++++++++++++++++++---------------------
 1 file changed, 29 insertions(+), 30 deletions(-)
---
--- a/arch/x86/kernel/cpu/topology.c
+++ b/arch/x86/kernel/cpu/topology.c
@@ -23,25 +23,24 @@ DECLARE_BITMAP(phys_cpu_present_map, MAX
 u32 cpuid_to_apicid[] __read_mostly = { [0 ... NR_CPUS - 1] = BAD_APICID, };
 
 /*
+ * Keep track of assigned, disabled and rejected CPUs. Present assigned
+ * with 1 as CPU #0 is reserved for the boot CPU.
+ */
+static struct {
+	unsigned int		nr_assigned_cpus;
+	unsigned int		nr_disabled_cpus;
+	unsigned int		nr_rejected_cpus;
+} topo_info __read_mostly = {
+	.nr_assigned_cpus	= 1,
+};
+
+/*
  * Processor to be disabled specified by kernel parameter
  * disable_cpu_apicid=<int>, mostly used for the kdump 2nd kernel to
  * avoid undefined behaviour caused by sending INIT from AP to BSP.
  */
 static u32 disabled_cpu_apicid __ro_after_init = BAD_APICID;
 
-static unsigned int num_processors;
-static unsigned int disabled_cpus;
-
-/*
- * The number of allocated logical CPU IDs. Since logical CPU IDs are allocated
- * contiguously, it equals to current allocated max logical CPU ID plus 1.
- * All allocated CPU IDs should be in the [0, nr_logical_cpuids) range,
- * so the maximum of nr_logical_cpuids is nr_cpu_ids.
- *
- * NOTE: Reserve 0 for BSP.
- */
-static int nr_logical_cpuids = 1;
-
 bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
 {
 	return phys_id == (u64)cpuid_to_apicid[cpu];
@@ -75,7 +74,7 @@ static int __init smp_init_primary_threa
 		return 0;
 	}
 
-	for (cpu = 0; cpu < nr_logical_cpuids; cpu++)
+	for (cpu = 0; cpu < topo_info.nr_assigned_cpus; cpu++)
 		cpu_mark_primary_thread(cpu, cpuid_to_apicid[cpu]);
 	return 0;
 }
@@ -89,7 +88,7 @@ static int topo_lookup_cpuid(u32 apic_id
 	int i;
 
 	/* CPU# to APICID mapping is persistent once it is established */
-	for (i = 0; i < nr_logical_cpuids; i++) {
+	for (i = 0; i < topo_info.nr_assigned_cpus; i++) {
 		if (cpuid_to_apicid[i] == apic_id)
 			return i;
 	}
@@ -107,22 +106,21 @@ static int allocate_logical_cpuid(u32 ap
 	if (cpu >= 0)
 		return cpu;
 
-	cpuid_to_apicid[nr_logical_cpuids] = apic_id;
-	return nr_logical_cpuids++;
+	return topo_info.nr_assigned_cpus++;
 }
 
-static void cpu_update_apic(int cpu, u32 apicid)
+static void cpu_update_apic(unsigned int cpu, u32 apic_id)
 {
 #if defined(CONFIG_SMP) || defined(CONFIG_X86_64)
-	early_per_cpu(x86_cpu_to_apicid, cpu) = apicid;
+	early_per_cpu(x86_cpu_to_apicid, cpu) = apic_id;
 #endif
+	cpuid_to_apicid[cpu] = apic_id;
 	set_cpu_possible(cpu, true);
-	set_bit(apicid, phys_cpu_present_map);
+	set_bit(apic_id, phys_cpu_present_map);
 	set_cpu_present(cpu, true);
-	num_processors++;
 
 	if (system_state != SYSTEM_BOOTING)
-		cpu_mark_primary_thread(cpu, apicid);
+		cpu_mark_primary_thread(cpu, apic_id);
 }
 
 static int generic_processor_info(int apicid)
@@ -137,18 +135,18 @@ static int generic_processor_info(int ap
 		return 0;
 
 	if (disabled_cpu_apicid == apicid) {
-		int thiscpu = num_processors + disabled_cpus;
+		int thiscpu = topo_info.nr_assigned_cpus + topo_info.nr_disabled_cpus;
 
 		pr_warn("APIC: Disabling requested cpu. Processor %d/0x%x ignored.\n",
 			thiscpu, apicid);
 
-		disabled_cpus++;
+		topo_info.nr_rejected_cpus++;
 		return -ENODEV;
 	}
 
-	if (num_processors >= nr_cpu_ids) {
+	if (topo_info.nr_assigned_cpus >= nr_cpu_ids) {
 		pr_warn_once("APIC: CPU limit of %d reached. Ignoring further CPUs\n", nr_cpu_ids);
-		disabled_cpus++;
+		topo_info.nr_rejected_cpus++;
 		return -ENOSPC;
 	}
 
@@ -178,14 +176,16 @@ static int __initdata setup_possible_cpu
  */
 __init void prefill_possible_map(void)
 {
+	unsigned int num_processors = topo_info.nr_assigned_cpus;
+	unsigned int disabled_cpus = topo_info.nr_disabled_cpus;
 	int i, possible;
 
 	i = setup_max_cpus ?: 1;
 	if (setup_possible_cpus == -1) {
-		possible = num_processors;
+		possible = topo_info.nr_assigned_cpus;
 #ifdef CONFIG_HOTPLUG_CPU
 		if (setup_max_cpus)
-			possible += disabled_cpus;
+			possible += num_processors;
 #else
 		if (possible > i)
 			possible = i;
@@ -238,7 +238,7 @@ void __init topology_register_apic(u32 a
 	}
 
 	if (!present) {
-		disabled_cpus++;
+		topo_info.nr_disabled_cpus++;
 		return;
 	}
 
@@ -295,7 +295,6 @@ void topology_hotunplug_apic(unsigned in
 	per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID;
 	clear_bit(apic_id, phys_cpu_present_map);
 	set_cpu_present(cpu, false);
-	num_processors--;
 }
 #endif
 


  parent reply	other threads:[~2024-01-23 13:11 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-23 13:10 [patch v2 00/30] x86/apic: Rework APIC registration Thomas Gleixner
2024-01-23 13:10 ` [patch v2 01/30] x86/cpu/topology: Move registration out of APIC code Thomas Gleixner
2024-01-23 13:10 ` [patch v2 02/30] x86/cpu/topology: Provide separate APIC registration functions Thomas Gleixner
2024-01-23 13:10 ` [patch v2 03/30] x86/acpi: Use new " Thomas Gleixner
2024-01-23 13:10 ` [patch v2 04/30] x86/jailhouse: Use new APIC registration function Thomas Gleixner
2024-01-23 13:10 ` [patch v2 05/30] x86/of: Use new APIC registration functions Thomas Gleixner
2024-01-23 13:10 ` [patch v2 06/30] x86/mpparse: Use new APIC registration function Thomas Gleixner
2024-01-23 13:11 ` [patch v2 07/30] x86/acpi: Dont invoke topology_register_apic() for XEN PV Thomas Gleixner
2024-01-23 13:11 ` [patch v2 08/30] x86/xen/smp_pv: Register fake APICs Thomas Gleixner
2024-01-23 13:11 ` [patch v2 09/30] x86/cpu/topology: Confine topology information Thomas Gleixner
2024-01-23 13:11 ` [patch v2 10/30] x86/cpu/topology: Simplify APIC registration Thomas Gleixner
2024-01-23 13:11 ` Thomas Gleixner [this message]
2024-01-23 13:11 ` [patch v2 12/30] x86/smpboot: Make error message actually useful Thomas Gleixner
2024-01-23 13:11 ` [patch v2 13/30] x86/cpu/topology: Sanitize the APIC admission logic Thomas Gleixner
2024-01-23 13:11 ` [patch v2 14/30] x86/cpu/topology: Rework possible CPU management Thomas Gleixner
2024-01-31 23:47   ` Sohil Mehta
2024-01-23 13:11 ` [patch v2 15/30] x86/cpu: Detect real BSP on crash kernels Thomas Gleixner
2024-01-31 17:59   ` Michael Kelley
2024-01-23 13:11 ` [patch v2 16/30] x86/topology: Add a mechanism to track topology via APIC IDs Thomas Gleixner
2024-01-23 13:11 ` [patch v2 17/30] x86/cpu/topology: Reject unknown APIC IDs on ACPI hotplug Thomas Gleixner
2024-01-23 13:11 ` [patch v2 18/30] x86/cpu/topology: Assign hotpluggable CPUIDs during init Thomas Gleixner
2024-01-23 13:11 ` [patch v2 19/30] x86/xen/smp_pv: Count number of vCPUs early Thomas Gleixner
2024-01-23 13:11 ` [patch v2 20/30] x86/cpu/topology: Let XEN/PV use topology from CPUID/MADT Thomas Gleixner
2024-01-23 13:11 ` [patch v2 21/30] x86/cpu/topology: Use topology bitmaps for sizing Thomas Gleixner
2024-01-26  7:07   ` Zhang, Rui
2024-01-26 20:22     ` Thomas Gleixner
2024-01-28 20:01       ` Paul E. McKenney
2024-02-12 16:40       ` Thomas Gleixner
2024-02-12 19:49         ` Michael Kelley
2024-02-13 20:23         ` Sohil Mehta
2024-01-23 13:11 ` [patch v2 22/30] x86/cpu/topology: Mop up primary thread mask handling Thomas Gleixner
2024-01-23 13:11 ` [patch v2 23/30] x86/cpu/topology: Simplify cpu_mark_primary_thread() Thomas Gleixner
2024-01-23 13:11 ` [patch v2 24/30] x86/cpu/topology: Provide logical pkg/die mapping Thomas Gleixner
2024-01-23 13:11 ` [patch v2 25/30] x86/cpu/topology: Use topology logical mapping mechanism Thomas Gleixner
2024-02-01 22:31   ` Sohil Mehta
2024-02-02  6:45   ` Zhang, Rui
2024-02-12 16:21     ` Thomas Gleixner
2024-01-23 13:11 ` [patch v2 26/30] x86/cpu/topology: Retrieve cores per package from topology bitmaps Thomas Gleixner
2024-01-23 13:11 ` [patch v2 27/30] x86/cpu/topology: Rename smp_num_siblings Thomas Gleixner
2024-01-23 13:11 ` [patch v2 28/30] x86/cpu/topology: Rename topology_max_die_per_package() Thomas Gleixner
2024-01-23 13:11 ` [patch v2 29/30] x86/cpu/topology: Provide __num_[cores|threads]_per_package Thomas Gleixner
2024-01-23 13:11 ` [patch v2 30/30] x86/cpu/topology: Get rid of cpuinfo::x86_max_cores Thomas Gleixner
2024-01-24 14:31 ` [patch v2 00/30] x86/apic: Rework APIC registration Zhang, Rui
2024-02-01 22:10 ` Sohil Mehta

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