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Bottomley" , "Martin K. Petersen" , Hannes Reinecke , Janek Kotas , Alim Akhtar , Avri Altman , Bart Van Assche , Can Guo Cc: Andrew Halaney , Will Deacon , linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH RFC v4 11/11] scsi: ufs: core: Remove unnecessary wmb() prior to writing run/stop regs Date: Mon, 22 Jan 2024 11:24:07 -0600 Message-ID: <20240122-ufs-reset-ensure-effect-before-delay-v4-11-90a54c832508@redhat.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240122-ufs-reset-ensure-effect-before-delay-v4-0-90a54c832508@redhat.com> References: <20240122-ufs-reset-ensure-effect-before-delay-v4-0-90a54c832508@redhat.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Currently a wmb() is used to ensure that writes to the=0D UTP_TASK_REQ_LIST_BASE* regs are completed prior to following writes to=0D the run/stop registers.=0D =0D wmb() ensure that the write completes, but completion doesn't mean that=0D it isn't stored in a buffer somewhere. The recommendation for=0D ensuring the bits have taken effect on the device is to perform a read=0D back to force it to make it all the way to the device. This is=0D documented in device-io.rst and a talk by Will Deacon on this can=0D be seen over here:=0D =0D https://youtu.be/i6DayghhA8Q?si=3DMiyxB5cKJXSaoc01&t=3D1678=0D =0D But, none of that is necessary here. All of the writel()/readl()'s here=0D are to the same endpoint, so they will be ordered. There's no subsequent=0D delay() etc that requires it to have taken effect already, so no=0D readback is necessary here.=0D =0D For that reason just drop the wmb() altogether.=0D =0D Fixes: 897efe628d7e ("scsi: ufs: add missing memory barriers")=0D Signed-off-by: Andrew Halaney =0D ---=0D drivers/ufs/core/ufshcd.c | 6 ------=0D 1 file changed, 6 deletions(-)=0D =0D diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c=0D index 21f93d8e5818..358857ea9ff6 100644=0D --- a/drivers/ufs/core/ufshcd.c=0D +++ b/drivers/ufs/core/ufshcd.c=0D @@ -4722,12 +4722,6 @@ int ufshcd_make_hba_operational(struct ufs_hba *hba)= =0D ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),=0D REG_UTP_TASK_REQ_LIST_BASE_H);=0D =0D - /*=0D - * Make sure base address and interrupt setup are updated before=0D - * enabling the run/stop registers below.=0D - */=0D - wmb();=0D -=0D /*=0D * UCRDY, UTMRLDY and UTRLRDY bits must be 1=0D */=0D =0D -- =0D 2.43.0=0D =0D