From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 03EB45788A; Sun, 28 Jan 2024 16:12:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706458367; cv=none; b=CnD4Fzavkd3OFnj7M/OBu59Fh5QgVu4tp2bb+iMVH99gOawIyqBnnw3TCCfQdPDeIb9FrMitGZN/6YBOHuHuY/IlU8pXmyt2LRxC6F4tZ2Fq9jX/Q8niK0QXDE0r5ziA8550sfHDvIr1Hc73A9MJKNoC5VmLVBTXfDC+rWos2Ww= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706458367; c=relaxed/simple; bh=azj0o16XNmiPoWegTfpJ3DfekAM5KM8ILmUwFJKxRGE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=oXzrW7CrvCI0iG3/bP7RhH2DShY/NA1vKv7+C/eu3aEIzbikRe7FhAMNCUGSf1vYrYnfBi44s31vaX+0/LV/+o/Gf+fyxP9y6IaS9WR19SSauQFzMss+ZYEMow09wLcJslIfjq2bOiDrgY2AIadNivW5AgfuePJ+foBSCAWl3C4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ks5ah+47; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ks5ah+47" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2F59AC433F1; Sun, 28 Jan 2024 16:12:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1706458366; bh=azj0o16XNmiPoWegTfpJ3DfekAM5KM8ILmUwFJKxRGE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ks5ah+47TwmgVu5dLWvA1PE/56hLDn+VFBztaX798SHy7pne/n5neXTrlXg0opV6R Ks7fJJ5adAM5f7cr1VzIVgjH6HyIZpE0p2XV7MvDht4mFqhVtvWHWLtCRyO+aiV95I F1xunLFZuTSkQ/6/2F/vmzUoR1AXFtmHye/rMN31tG7LTKHhJq+JDJWq7Y8YyAv6MN 5UB/N8rfyQHcdNS6xr5jSasEiByl2wnBgLCX/8/9DTztBVxtXSIRf1xz9j4T+x1Obh mpTAt4aijRn9dDAcJSJEESnRSTv7+k33TrLs+kkDwrNRi32bsMwq8NFSAtnTutqXeQ Zr0QYNurVoBLQ== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Alex Deucher , Yang Wang , Sasha Levin , evan.quan@amd.com, christian.koenig@amd.com, Xinhui.Pan@amd.com, airlied@gmail.com, daniel@ffwll.ch, mario.limonciello@amd.com, sunran001@208suo.com, ruanjinjie@huawei.com, alexious@zju.edu.cn, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [PATCH AUTOSEL 6.7 34/39] drm/amdgpu: fix avg vs input power reporting on smu7 Date: Sun, 28 Jan 2024 11:10:54 -0500 Message-ID: <20240128161130.200783-34-sashal@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240128161130.200783-1-sashal@kernel.org> References: <20240128161130.200783-1-sashal@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore X-stable-base: Linux 6.7.2 Content-Transfer-Encoding: 8bit From: Alex Deucher [ Upstream commit 25852d4b97572ff62ffee574cb8bb4bc551af23a ] Hawaii, Bonaire, Fiji, and Tonga support average power, the others support current power. Reviewed-by: Yang Wang Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- .../gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c index 11372fcc59c8..a2c7b2e111fa 100644 --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c @@ -3995,6 +3995,7 @@ static int smu7_read_sensor(struct pp_hwmgr *hwmgr, int idx, uint32_t sclk, mclk, activity_percent; uint32_t offset, val_vid; struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); + struct amdgpu_device *adev = hwmgr->adev; /* size must be at least 4 bytes for all sensors */ if (*size < 4) @@ -4038,7 +4039,21 @@ static int smu7_read_sensor(struct pp_hwmgr *hwmgr, int idx, *size = 4; return 0; case AMDGPU_PP_SENSOR_GPU_INPUT_POWER: - return smu7_get_gpu_power(hwmgr, (uint32_t *)value); + if ((adev->asic_type != CHIP_HAWAII) && + (adev->asic_type != CHIP_BONAIRE) && + (adev->asic_type != CHIP_FIJI) && + (adev->asic_type != CHIP_TONGA)) + return smu7_get_gpu_power(hwmgr, (uint32_t *)value); + else + return -EOPNOTSUPP; + case AMDGPU_PP_SENSOR_GPU_AVG_POWER: + if ((adev->asic_type != CHIP_HAWAII) && + (adev->asic_type != CHIP_BONAIRE) && + (adev->asic_type != CHIP_FIJI) && + (adev->asic_type != CHIP_TONGA)) + return -EOPNOTSUPP; + else + return smu7_get_gpu_power(hwmgr, (uint32_t *)value); case AMDGPU_PP_SENSOR_VDDGFX: if ((data->vr_config & VRCONF_VDDGFX_MASK) == (VR_SVI2_PLANE_2 << VRCONF_VDDGFX_SHIFT)) -- 2.43.0