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Fri, 02 Feb 2024 04:44:18 -0800 (PST) X-Forwarded-Encrypted: i=0; AJvYcCXlxolnBRum91Y/AqKP2BCANY3KuTteRYOFf3lJx7luihX6UAtboZl9soeI4NSaT4AKy6oYWyyWbz5sEoKGMCJKR8uvEynUck+/7BOPKlxRTWbRJZZ2cKTifj+GMQmWKenC2L1ag5NegC8lWZrFA8Ad7pitBdw/+JYAB8Ir8w6JvDJNtyOZ7dpT1pYJjD0FCM3aUd5jw63zkAmkeK7i16cP1LH4nc+FPVk+AoQOY4IKHT0VSbihdO94RkzXy3YeBqWkNMJ0Gs3PhNNykwr/1FZQJHGpRzJLOOkOX5swMm/tAOfQRM4/SmoZFMRc Received: from thinkpad ([120.56.198.122]) by smtp.gmail.com with ESMTPSA id ml12-20020a17090334cc00b001d8f6ae51aasm1535215plb.64.2024.02.02.04.44.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Feb 2024 04:44:17 -0800 (PST) Date: Fri, 2 Feb 2024 18:14:12 +0530 From: Manivannan Sadhasivam To: Abel Vesa Cc: Bjorn Andersson , Konrad Dybcio , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 1/2] dt-bindings: PCI: qcom: Document the X1E80100 PCIe Controller Message-ID: <20240202124412.GF8020@thinkpad> References: <20240129-x1e80100-pci-v2-0-a466d10685b6@linaro.org> <20240129-x1e80100-pci-v2-1-a466d10685b6@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20240129-x1e80100-pci-v2-1-a466d10685b6@linaro.org> On Mon, Jan 29, 2024 at 01:10:26PM +0200, Abel Vesa wrote: > Document the PCIe Controllers on the X1E80100 platform. They are similar > to the ones found on SM8550, but they don't have SF QTB clock. > > Signed-off-by: Abel Vesa Acked-by: Manivannan Sadhasivam - Mani > --- > .../devicetree/bindings/pci/qcom,pcie.yaml | 29 ++++++++++++++++++++++ > 1 file changed, 29 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > index a93ab3b54066..7381e38b7398 100644 > --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > @@ -41,6 +41,7 @@ properties: > - qcom,pcie-sm8450-pcie0 > - qcom,pcie-sm8450-pcie1 > - qcom,pcie-sm8550 > + - qcom,pcie-x1e80100 > - items: > - enum: > - qcom,pcie-sm8650 > @@ -227,6 +228,7 @@ allOf: > - qcom,pcie-sm8450-pcie0 > - qcom,pcie-sm8450-pcie1 > - qcom,pcie-sm8550 > + - qcom,pcie-x1e80100 > then: > properties: > reg: > @@ -826,6 +828,32 @@ allOf: > items: > - const: pci # PCIe core reset > > + - if: > + properties: > + compatible: > + contains: > + enum: > + - qcom,pcie-x1e80100 > + then: > + properties: > + clocks: > + maxItems: 7 > + clock-names: > + items: > + - const: aux # Auxiliary clock > + - const: cfg # Configuration clock > + - const: bus_master # Master AXI clock > + - const: bus_slave # Slave AXI clock > + - const: slave_q2a # Slave Q2A clock > + - const: noc_aggr # Aggre NoC PCIe AXI clock > + - const: cnoc_sf_axi # Config NoC PCIe1 AXI clock > + resets: > + maxItems: 2 > + reset-names: > + items: > + - const: pci # PCIe core reset > + - const: link_down # PCIe link down reset > + > - if: > properties: > compatible: > @@ -884,6 +912,7 @@ allOf: > - qcom,pcie-sm8450-pcie0 > - qcom,pcie-sm8450-pcie1 > - qcom,pcie-sm8550 > + - qcom,pcie-x1e80100 > then: > oneOf: > - properties: > > -- > 2.34.1 > -- மணிவண்ணன் சதாசிவம்