From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Cc: Anatoliy Klymenko <anatoliy.klymenko@amd.com>,
maarten.lankhorst@linux.intel.com, mripard@kernel.org,
tzimmermann@suse.de, airlied@gmail.com, daniel@ffwll.ch,
michal.simek@amd.com, dri-devel@lists.freedesktop.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 0/5] Fixing live video input in ZynqMP DPSUB
Date: Mon, 5 Feb 2024 09:29:08 +0200 [thread overview]
Message-ID: <20240205072908.GE6804@pendragon.ideasonboard.com> (raw)
In-Reply-To: <20240124025402.373620-1-anatoliy.klymenko@amd.com>
Hello,
This series looks good. Tomi, could you get it merged through drm-misc ?
On Tue, Jan 23, 2024 at 06:53:57PM -0800, Anatoliy Klymenko wrote:
> Add few missing pieces to support ZynqMP DPSUB live video in mode.
>
> ZynqMP DPSUB supports 2 modes of operations in regard to video data
> input.
>
> In the first mode, DPSUB uses DMA engine to pull video data from memory
> buffers. To support this the driver implements CRTC and DRM bridge
> representing DP encoder.
>
> In the second mode, DPSUB acquires video data pushed from FPGA and
> passes it downstream to DP output. This mode of operation is modeled in
> the driver as a DRM bridge that should be attached to some external
> CRTC.
>
> Patches 1/5,2/5,3/5,4/5 are minor fixes.
>
> DPSUB requires input live video format to be configured.
> Patch 5/5: The DP Subsystem requires the input live video format to be
> configured. In this patch, we are assuming that the CRTC's bus format is
> fixed (typical for FPGA CRTC) and comes from the device tree. This is a
> proposed solution, as there is no API to query CRTC output bus format
> or negotiate it in any other way.
>
> Changes in v2:
> - Address reviewers' comments:
> - More elaborate and consistent comments / commit messages
> - Fix includes' order
> - Replace of_property_read_u32_index() with of_property_read_u32()
>
> Changes in v3:
> - Split patch #3 into 3) moving status register clear immediately after
> read; 4) masking status against interrupts' mask
>
> Link to v1: https://lore.kernel.org/all/20240112234222.913138-1-anatoliy.klymenko@amd.com/
> Link to v2: https://lore.kernel.org/all/20240119055437.2549149-1-anatoliy.klymenko@amd.com/
>
> Anatoliy Klymenko (5):
> drm: xlnx: zynqmp_dpsub: Make drm bridge discoverable
> drm: xlnx: zynqmp_dpsub: Fix timing for live mode
> drm: xlnx: zynqmp_dpsub: Clear status register ASAP
> drm: xlnx: zynqmp_dpsub: Filter interrupts against mask
> drm: xlnx: zynqmp_dpsub: Set live video in format
>
> drivers/gpu/drm/xlnx/zynqmp_disp.c | 111 +++++++++++++++++++++---
> drivers/gpu/drm/xlnx/zynqmp_disp.h | 3 +-
> drivers/gpu/drm/xlnx/zynqmp_disp_regs.h | 8 +-
> drivers/gpu/drm/xlnx/zynqmp_dp.c | 16 +++-
> drivers/gpu/drm/xlnx/zynqmp_kms.c | 2 +-
> 5 files changed, 119 insertions(+), 21 deletions(-)
--
Regards,
Laurent Pinchart
next prev parent reply other threads:[~2024-02-05 7:29 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-24 2:53 [PATCH v3 0/5] Fixing live video input in ZynqMP DPSUB Anatoliy Klymenko
2024-01-24 2:53 ` [PATCH v3 1/5] drm: xlnx: zynqmp_dpsub: Make drm bridge discoverable Anatoliy Klymenko
2024-01-24 2:53 ` [PATCH v3 2/5] drm: xlnx: zynqmp_dpsub: Fix timing for live mode Anatoliy Klymenko
2024-02-05 8:08 ` Laurent Pinchart
2024-02-05 22:22 ` Klymenko, Anatoliy
2024-01-24 2:54 ` [PATCH v3 3/5] drm: xlnx: zynqmp_dpsub: Clear status register ASAP Anatoliy Klymenko
2024-02-01 7:39 ` Tomi Valkeinen
2024-02-05 7:33 ` Laurent Pinchart
2024-01-24 2:54 ` [PATCH v3 4/5] drm: xlnx: zynqmp_dpsub: Filter interrupts against mask Anatoliy Klymenko
2024-02-01 7:41 ` Tomi Valkeinen
2024-02-05 7:35 ` Laurent Pinchart
2024-01-24 2:54 ` [PATCH v3 5/5] drm: xlnx: zynqmp_dpsub: Set live video in format Anatoliy Klymenko
2024-02-05 7:29 ` Laurent Pinchart [this message]
2024-02-05 8:26 ` [PATCH v3 0/5] Fixing live video input in ZynqMP DPSUB Laurent Pinchart
2024-02-07 13:24 ` Tomi Valkeinen
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